5. Signal descriptions

The AXI register slice uses standard AMBA AXI signals as described in the AMBA AXI Protocol Specification.

Note

In this section:

  • The read channel and write channel signals are appended with:

    • the letter M for signals that connect to the component master interface

    • the letter S for signals that connect to the component slave interface.

  • The upper value of some bus widths is provided as a name to indicate that the number of signal lines in the bus is derived from user-defined generics or parameters. These are described in the PrimeCell Infrastructure AMBA 3 AHB Register Slice (BP130) Design Manual.

  • A number of user-defined signal lines are provided. These are named xUSERM or xUSERS, the letter x denotes the AXI channel and can be any of the following:

    AW

    Write address channel.

    W

    Write data channel.

    B

    Write response channel.

    AR

    Read address channel.

    R

    Read data channel.

The register slice signals are shown in:

Copyright © 2004 ARM Limited. All rights reserved.ARM DTO 0012A
Non-Confidential