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Figure 3 shows the signal connections.
In Figure 3:
AXI signals that are not present on the slave and master interfaces bypass the TZMA.
The read channel and write channel signals are appended with:
the letter M for signals that connect to the component master interface
the letter S for signals that connect to the component slave interface.
The upper value of some bus widths is provided as a name to indicate that the number of signal lines in the bus is derived from user-defined generics or parameters. The PrimeCell Infrastructure AMBA 3 AXI TrustZone Memory Adapter (BP141) Design Manual describes these.
The TZMA signals are described in: