5. Signal descriptions

Table 5 lists the non-standard AXI and scan signals.

Table 5. Non-standard AXI and scan signals

NameTypeDescription
ACLKMInputMaster interface clock
ACLKSInputSlave interface clock
ARESETMnInputMaster interface reset
ARESETSnInputSlave interface reset
AWUSERMOutputAdditional master interface signals for the write address channel
AWUSERSInputAdditional slave interface signals for the write address channel
WUSERMOutputAdditional master interface signals for the write data channel
WUSERSInputAdditional slave interface signals for the write data channel
BUSERMInputAdditional master interface signals for the write response channel
BUSERSOutputAdditional slave interface signals for the write response channel
ARUSERMOutputAdditional master interface signals for the read address channel
ARUSERSInputAdditional slave interface signals for the read address channel
RUSERMInputAdditional master interface signals for the read data channel
RUSERSOutputAdditional slave interface signals for the read data channel
SYNCMODEACKOutputSynchronous bypass mode acknowledge
SYNCMODEREQInputSynchronous bypass mode request
SCANENABLEInputScan logic common scan mode enable
SCANINACLKMInputScan logic master interface clock domain scan chain input
SCANINACLKSInputScan logic slave interface clock domain scan chain input
SCANOUTACLKMOutputScan logic master interface clock domain scan chain output
SCANOUTACLKSOutputScan logic slave interface clock domain scan chain output

Figure 3 shows the AXI asynchronous bridge signal connections.

Note

In Figure 3:

  • The read channel, write channel, and low-power interface signals are standard AMBA AXI signals that the AMBA AXI Protocol Specification describes. The signal names are appended with:

    • the letter M for signals that connect to the component master interface

    • the letter S for signals that connect to the component slave interface.

  • The scan signals are not shown.

The bridge has no low-power interface signals because it has no low power mode and does not initiate AXI transactions.

Figure 3. Asynchronous bridge signal connections

Copyright © 2005-2006 ARM Limited. All rights reserved.ARM DTO 0023B
Non-Confidential