12.3.3. Interpreting trace file output

This section describes how you interpret the output from the tracer.

Example of a trace file

The following example shows part of a trace file:


Date: Fri Jul 10 13:29:16 1998
Source: Armul
Options: Trace Instructions  (Disassemble)  Trace Memory Cycles  
MNR4O__ 00008008 EB00000C
MSR4O__ 0000800C EB00001B
MSR4O__ 00008010 EF000011
IT 00008008 eb00000c BL       0x8040
MNR4O__ 00008040 E1A00000
MSR4O__ 00008044 E04EC00F
MSR4O__ 00008048 E08FC00C
IT 00008040 e1a00000 NOP      
MSR4O__ 0000804C E99C000F
IT 00008044 e04ec00f SUB      r12,r14,pc
MSR4O__ 00008050 E24CC010
IT 00008048 e08fc00c ADD      r12,pc,r12
E 00000020 00000000 10005
MNR4O__ 00000020 E1A00000
IT 00000018 eb00000a BL       0x48
E 00000048 00000000 10005
MNR4O__ 00000048 E10F0000
E 0000004C 00000000 10005
MSR4O__ 0000004C E1A00000

In a trace file, there are three types of line:

  • trace memory lines (M lines)

  • trace instruction lines (I lines)

  • trace event lines (E lines).

These are described in the following sections.

Trace memory (M lines)

The format of the trace memory (M) lines is as follows:


access addr data

For example:


MNR4O__ 00008008 EB00000C

where:

access

contains the following information:

memory_access

indicates a memory access (M in trace file).

memory_cycle

indicates the type of memory cycle:

S

sequential.

N

non-sequential.

I

idle.

C

coprocessor.

read_write

indicates either a read or a write operation:

R

read.

W

write.

mem_acc_size

indicates the size of the memory access:

4

word (32 bits).

2

halfword (16 bits).

1

byte (8 bits).

opcode_fetch

indicates an opcode fetch:

O

opcode fetch.

_

no opcode fetch.

locked_access

indicates a locked access:

L

locked access (LOCK signal HIGH).

_

no locked access.

spec_fetch

indicates a speculative instruction fetch:

S

speculative fetch (ARM810 only).

_

no speculative fetch.

addr

gives the address. For example: 00008008.

data

can show one of the following:

value

gives the read/written value. For example: EB00000C

(wait)

indicates nWAIT was LOW to insert a wait state.

(abort)

indicates ABORT was HIGH to abort the access.

Trace instructions (I lines)

The format of the trace instruction (I) lines is as follows:


[ IT | IS ] instr_addr opcode disassembly

For example:


IT 00008044 e04ec00f SUB      r12,r14,pc

where:

IT

instruction taken.

IS

instruction skipped (all ARM instructions are conditional).

instr_addr

shows the address of the instruction. For example: 00008044.

opcode

gives the opcode, for example: e04ec00f.

disassembly

gives the disassembly (uppercase if the instruction is taken), for example, SUB r12,r14,pc. This is optional and is controlled by armul.cnf. Set Disassemble=True to enable this.

Events (E lines)

The format of the event (E) lines is as follows:


E addr1 addr2 event_number

For example:


E 00000048 00000000 10005

where:

addr1

gives the first of a pair of words, such as, the pc value.

addr2

gives the second of a pair of words, such as, the aborting address.

event_number

gives an event number, for example: 0x10005. This is MMU Event_ITLBWalk. Events are fully described in Events in the ARM Software Development Toolkit Reference Guide.

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