12.14.2. Implementation

There are eight banks of 128KB of RAM, one of which is currently mapped in to the top page. The memory model has two pieces of state:

In this model, the ARM does not need to run in different endian modes. You can assume that the ARM is configured to be the same endianness as the host architecture.

Note

If you want to allow the ARM to run in different endian modes, you must have a ConfigChange callback, as in armflat.c.

However, you do occasionally need to ensure that a write is allowed only if the nTRANS signal is HIGH, indicating that the processor is in a privileged mode. To enable you to know this, you must install a callback for changes to nTRANS, because it is not supplied to the memory access function. The core calls the callback whenever nTRANS changes (on mode changes), and when executing an LDRT/STRT instruction.

For an example of implementation code, look at the rebuild kit file on UNIX in:


armsd/source/example.c

or on PC in:


C:\ARM250\Source\Win32\ARMulate\example.c

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