5.7.1. ARM LDM and STM Instructions

The load (or store) multiple instruction loads (stores) any subset of the 16 general purpose registers from (to) memory, using a single instruction.

Syntax

The syntax of the LDM instructions is:

LDM{cond}address-mode Rn{!},reg-list{^}

where:

cond

is an optional condition code. Refer to Conditional execution for more information.

address-mode

specifies the addressing mode of the instruction. See LDM and STM addressing modes for details.

Rn

is the base register for the load operation. The address stored in this register is the starting address for the load operation. Do not specify r15 (pc) as the base register.

!

specifies base register write back. If this is specified, the address in the base register is updated after the transfer. It is decremented or incremented by one word for each register in the register list.

register-list

is a comma-delimited list of symbolic register names and register ranges enclosed in braces. There must be at least one register in the list. Register ranges are specified with a dash. For example:


{r0,r1,r4-r6,pc}

Do not specify writeback if the base register Rn is in register-list.

^

Do not use this option in User or System mode. For details of its use in privileged modes, see Chapter 9 Handling Processor Exceptions and the ARM Architectural Reference Manual.

The syntax of the STM instruction corresponds exactly (except for some details in the effect of the ^ option).

Usage

See Implementing stacks with LDM and STM and Block copy with LDM and STM.

Copyright © 1997, 1998 ARM Limited. All rights reserved.ARM DUI 0040D
Non-Confidential