9.1.3. Exception priorities

When several exceptions occur simultaneously, they are serviced in a fixed order of priority. Each exception is handled in turn before execution of the user program continues. It is not possible for all exceptions to occur concurrently. For example, the undefined instruction and SWI exceptions are mutually exclusive because they are both triggered by executing an instruction.

Table 9.2 shows the exceptions, their corresponding processor modes and their handling priorities.

Because the Data Abort exception has a higher priority that the FIQ exception, the Data Abort is actually registered before the FIQ is handled. The Data Abort handler is entered, but control is then passed immediately to the FIQ handler. When the FIQ has been handled, control returns to the Data Abort Handler. This means that the data transfer error does not escape detection as it would if the FIQ were handled first.

Table 9.2. 

Vector AddressException TypeException ModePriority (1=High, 6=Low)
0x0Resetsupervisor (SVC)1
0x4Undefined Instructionundef6
0x8Software Interrupt (SWI)supervisor (SVC)6
0xCPrefetch Abortabort5
0x10Data Abortabort2
0x14ReservedNot ApplicableNot Applicable
0x18Interrupt (IRQ)interrupt (irq)4
0x1CFast Interrupt (FIQ)fast interrupt (fiq)3
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