| Copyright © 1997, 1998 ARM Limited. All rights reserved. | ARM DUI 0040D |
| Non-Confidential | |
 PDF version | |
| Home > ARMulator > Page table manager > Controlling the MMU and cache |
| |||
| Home > ARMulator > Page table manager > Controlling the MMU and cache | |||
The first set of flags controls the MMU and cache:
MMU=Yes
AlignFaults=No
Cache=Yes
WriteBuffer=Yes
Prog32=Yes
Data32=Yes
LateAbort=Yes
BigEnd=No
BranchPredict=Yes
ICache=Yes
Some flags only apply to certain processors. For example, BranchPredict only
applies to the ARM810, and ICache to the SA-110
and ARM940T processors.
| Copyright © 1997, 1998 ARM Limited. All rights reserved. | ARM DUI 0040D |
| Non-Confidential | |
| PDF version | |
| Home > ARMulator > Page table manager > Controlling the MMU and cache |