12.10.3. How ARMmap calculates wait-states

The memory map file specifies access times in nanoseconds for non-sequential/sequential reads/writes to various regions of memory. By inserting wait-states, the ARMmap memory model ensures that every access from the ARM processor takes at least that long.

The number of wait-states inserted is the least number required to take the total access time over the number of nanoseconds specified in the memory map file. For example, with a clock speed of 33MHz (a period of 30ns), an access specified to take 70ns in a memory map file results in two wait-states being inserted, to lengthen the access to 90ns.

This can lead to inefficiencies in your design. For example, if the access time were 60ns—only 14% faster—ARMmap would insert only one wait-state—33% quicker.

A mismatch between processor clock-speed and memory map file can sometimes lead to faster processor speeds having worse performance. For example, a 100MHz processor (10ns period) will take 5 wait-states to access 60ns memory—total access time, 60ns. At 110MHz, ARMmap must insert 6 wait-states—total access time, 63ns. So the 100MHz-processor system is faster than the 110MHz processor, if connected to 60ns memory. (This does not apply to cached processors, where the 110MHz processor would be faster.)

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