| Copyright © 1997, 1998 ARM Limited. All rights reserved. | ARM DUI 0041C |
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This release of the ARM Software Development Toolkit introduces numerous enhancements and new features. The major changes are described in:
Compiling for debug (-g), and the optimization
level (-O), have been made orthogonal in the compilers.There
are 3 levels of optimization:
-O0Turns off all optimization, except some simple source transformations.
-O1Turns off structure splitting, range splitting, cross-jumping, and conditional execution optimizations. Also, no debug data for inline functions is generated.
-O2Full optimization.
The -O0 option gives the best debug view,
but with the least optimized code.
The -O1 option gives a satisfactory debug
view, with good code density. By default no debug data is emitted
for inline functions, so they cannot be debugged. With DWARF1 debug
tables (-dwarf1 command-line option), variables
local to a function are not visible, and it is not possible to get
a stack backtrace.
The -O2 option emits fully optimized code
that is still acceptable to the debugger. However, the correct values
of variables are not always displayed, and the mapping of object
code to source code is not always clear, because of code re-ordering.
A new pragma has been introduced to specify that debug data
is to be emitted for inline functions. The pragma is #pragma
[no]debug_inlines. You can use this pragma to bracket
any number of inline functions. It can be used regardless of the
level of optimization chosen.
The compilers have been enhanced to perform instruction scheduling. Instruction scheduling involves the re-ordering of machine instruction to suit the particular processor for which the code is intended. Instruction scheduling in this version of the C and C++ compilers is performed after the register allocation and code generation phases of the compiler.
Instruction scheduling is of benefit to code for the StrongARM1 and ARM9 processor families:
if the -processor option
specifies any processor other than the StrongARM1, instruction scheduling
suitable for the ARM 9 is performed
if -processor StrongARM1 is specified,
instruction scheduling for the StrongARM1 is performed.
By
default, instruction scheduling is turned on. It can be turned off
with the -zpno_optimize_scheduling command-line
option.
In SDT 2.50 and C++ 1.10, the compilers generate one set of debug areas for each input file, including header files. The linker is able to detect multiple copies of the set of debug areas corresponding to an input file that is included more than once, and emits only one such set of debug areas in the final image. This can result in a considerable reduction in image size. This improvement is not available when ASD debug data is generated.
In SDT 2.11a and C++ 1.01 images compiled and linked for debug could be considerably larger than expected, because debug data was generated separately for each compilation unit. The linker emitted all the debug areas, because it was unable to identify multiple copies of debug data belonging to header files that were included more than once.
ARMulator models for the ARM9TDMI, ARM940T, ARM920T, ARM710T, ARM740T, ARM7TDMI-S, ARM7TDI-S, and ARM7T-S processors have been added to SDT 2.50. These are compatible with the memory model interfaces from the SDT 2.11a ARMulator.
These processor names (and those of all other released ARM
processors) are now permitted as arguments to the –processor command-line
option of the compilers and assembler.
ADW has been enhanced to provide the following additional features:
Support for remote debug using Multi-ICE.
Support for reading DWARF 2 debug tables.
The command-line options supported by armsd that are suitable for a GUI debugger are now understood on the ADW command line. This enables you, for example, always to start ADW in remote debug mode. The available command-line options are:
-symbols
-li, -bi
-armul
-adp –linespeed baudrate -port
[s=serial_port[,p=parallel_port]]
| [e=ethernet_address]
A delete all breakpoints facility.
Save and restore all window formats. Windows retain the format they were given.
Breakpoints can be set as 16-bit or 32-bit. The dialog box for setting a breakpoint has been modified to enable breakpoints to be set either as ARM or Thumb breakpoints, or for the choice to be left to the debugger.
The display of low-level symbols can be sorted either alphabetically or by address order (sorting was by address order only in SDT 2.11a). You can choose the order that is used.
Locals, Globals, and Debugger Internals windows
format is now controlled by $int_format, $uint_format, $float_format, $sbyte_format, $ubyte_format, $string_format, $complex_format.
These formats are available by selecting Change Default
Display Formats from the Options menu.
The Memory window now has halfword and byte added to its display formats.
Value fields in editable windows (for example, Variable windows and Memory windows) are now edit in place, rather than using a separate dialog box for entering new values.
A copy of ADW is also supplied in a file named MDW.exe to
maintain backwards compatibility with the Multi-ICE release.
The compilers in SDT 2.50 and C++ 1.10 have been enhanced
to provide an assembly language listing, annotated with the original
C or C++ source that produced the assembly language. Use the command-line
options -S –fs to get interleaved source and assembly
language.
This facility is not available if ASD debug tables are requested
(-g+ -asd).This facility is only easily accessible
from the command line, and is not integrated with APM.
The SDT 2.11a assemblers (armasm and tasm) have been merged
into a single assembler, called armasm, that supports both ARM code
and Thumb code. In addition, it provides functionality previously
supported only by tasm, such as the CODE16 and CODE32 directives,
and the -16 and -32 command-line
options. The assembler starts in ARM state by default. A tasm binary
is shipped with SDT 2.50 for compatibility reasons, however this
binary only invokes armasm –16.
The assembler now supports the following FPA pseudo-instructions:
LDFS fp-register,
=fp-constant
LDFD fp-register, =fp-constant
LDFE fp-register, =fp-constant
and the new directives DCWU and DCDU.
In the C and C++ compilers, the implementation of the long long data type has been optimized to inline most operators. This results in smaller and faster code. In particular:
long long res = (long long) x * (long long) y;
translates to a single SMULL instruction, instead
of a call to a long long multiply function, if
x and y are of type int.
The following enhancements have been made to the ARMulator:
Total cycle counts are always displayed.
Wait states and true idle cycles are counted separately if a map file is used.
F bus cycle counts are displayed if appropriate.
Verbose statistics are enabled by the line Counters=True in
the armul.cnf file. For cached cores, this
adds counters for TLB misses, write buffer stalls, and cache misses.
The instruction tracer now supports both Thumb and ARM instructions.
A new fast memory model is
supplied, that enables fast emulation without cycle counting. This
is enabled using Default=Fast in the armul.cnf file.
Trace output can be sent to a file or appended to the RDI log window.
The fromELF translation utility is a new tool in SDT 2.50. It can translate an ELF executable file into the following formats:
AIF family
Plain binary
Extended Intellec Hex (IHF) format
Motorola 32 bit S record format
Intel Hex 32 format
Textual Information.
This tool does not have a GUI integrated with APM. It can be called directly from the command line, or by editing your APM project to call fromELF after it calls the linker.
The Tool Configurer dialog boxes have been modified to reflect:
the new features available in the compilers, assembler, and the linker
the new default behavior of these tools.
Each selectable option on the dialog boxes now has a tool tip that displays the command-line equivalent for the option.
| Copyright © 1997, 1998 ARM Limited. All rights reserved. | ARM DUI 0041C |
| PDF version | |
| Home > Introduction > What is new? > Functionality enhancements and new functionality |