ARM Software Development Toolkit Reference GuideVersion 2.50
Home > Assembler > ARM pseudo-instructions > ADR ARM pseudo-instruction

5.5.1. ADR ARM pseudo-instruction

The ADR pseudo-instruction loads a program-relative or register-relative address into a register.

Syntax

The syntax of ADR is:

ADR{condition} register,expression

where:

register

is the register to load.

expression

is a program-relative or register-relative expressionthat evaluates to:

  • a non word-aligned address within 255 bytes

  • a word-aligned address within 1020 bytes.

The address can be either before or after the address of the instruction or the base register.

See Register-relative and program-relative expressions.

Usage

ADR always assembles to one instruction. The assembler attempts to produce a single ADD or SUB instruction to load the address. If the address cannot be constructed in a single instruction, an error is generated and the assembly fails.

Use the ADRL pseudo-instruction to assemble a wider range of effective addresses.

If expression is program-relative, it must evaluate to an address in the same code area as the ADR pseudo-instruction. Otherwise the address may be out of range after linking.

Example

start		MOV		r0,#10
		ADR		r4,start				; => SUB r4,pc,#0xc
Copyright © 1997, 1998 ARM Limited. All rights reserved.ARM DUI 0041C
Non-Confidential
PDF file icon  PDF version
Home > Assembler > ARM pseudo-instructions > ADR ARM pseudo-instruction