5.8.12. ALIGN directive

By default, the ALIGN directive aligns the current location within the code to a word (4-byte) boundary.


The syntax of ALIGN is:

ALIGN {expression{,offset-expression}}



can be any power of 2 from 20 to231. The current location is aligned to the next 2n-byte boundary. If this parameter is not specified, ALIGN sets the instruction location to the next word boundary.


defines a byte offset from the alignment specified by expression.


Use ALIGN to ensure that your code is correctly aligned. As a general rule it is safer to use ALIGN frequently through your code.

Use ALIGN to ensure that Thumb addresses are word aligned when required. For example, the ADR Thumb pseudo-instruction can only load addresses that are word aligned.

Use ALIGN when data definition directives appear in code areas. When data definition directives (DCB, DCW, DCWU, DCDU and %) are used in code areas, the program counter does not necessarily point to a word boundary. When the assembler encounters the next instruction mnemonic it inserts up to 3 bytes, if required, to ensure that the instruction is:

  • word aligned in ARM state

  • halfword aligned in Thumb state.

In this case, a label that appears on a source line by itself does not address the following instruction. Use ALIGN to ensure that the label addresses the following instruction. You can use ALIGN 2 to align on a halfword (2-byte) boundary in Thumb code.

Use ALIGN with a coarser setting to take advantage of caches on some ARM processors. For example, the ARM940T has a cache with 4-word lines. Use ALIGN 16 to align function entries on 16-byte boundaries and maximize the efficiency of the cache.

Alignment is relative to the start of the AOF area where the routine is located. You must ensure that the area is also aligned to the same, or coarser, boundaries. The ALIGN attribute on the AREA directive is specified differently. See AREA directive and the example below.


start		LDR		r6,=label1	
		DCB		1			; pc misaligned
		ALIGN					; ensures that label1 addresses
label1							; the following instruction.
		MOV r5,#0x5
		AREA		cacheable, CODE, ALIGN=4
rout1		; code					; aligned on 16-byte boundary
		; code
		MOV		pc,lr			; aligned only on 4-byte boundary
		ALIGN		16			; now aligned on 16-byte boundary
rout2		; code
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