5.5.4. LDFS ARM pseudo-instruction

The LDFS pseudo-instruction loads a floating-point register with a single precision floating-point constant.

Note

You can use LDFS only if your system has a Floating Point Accelerator, or software that emulates one.

This section describes the LDFS pseudo-instruction only. Refer to the ARM FPA10 Data Sheet for information on the LDFS instruction.

Syntax

The syntax of LDFS is:

LDFS{condition} fp-register,=expression

where:

condition

is an optional condition code.

fp-register

is the floating-point register to be loaded.

expression

evaluates to a floating-point constant. The assemblerplaces the constant in a literal pool and generates a program-relative LDFS instruction that reads the constant from the literal pool.

The offset from the pc to the constant must be less than 4KB. You are responsible for ensuring that there is a literal pool within range. See LTORG directive for more information.

Usage

The range for single precision values is:

  • Maximum 3.40282347e+38F

  • Minimum 1.17549435e–38F.

Example

		LDFS		f1,=3.12E-6				; loads 3.12E-6 into f1
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