F.2. Multi-ICE JTAG port timing characteristics

Figure F.2 and Table F.2 show the timing characteristics of the Multi-ICE unit. These must be considered if you design a target device or board and want to be able to connect Multi-ICE at a particular TCK frequency. The characteristics relate to the Multi-ICE hardware. You must consider them in parallel with the characteristics of your target.

In a JTAG device that fully complies to IEEE1149.1, TDI and TMS are sampled on the rising edge of TCK, and TDO changes on the falling edge of TCK. To take advantage of these properties, Multi-ICE samples TDO on the rising edge of TCK and changes its TDI and TMS signals on the falling edge of TCK. This means that with a fully compliant target, issues with minimum setup and hold times can always be resolved by simply decreasing the TCK frequency, because this increases the separation between signals changing and being sampled.

Figure F.2. Multi-ICE JTAG port timing diagram

Table F.2. Multi-ICE IEEE 1149.1 timing requirements

ParameterProgrammedMinMaxDescriptionNote
TbsclYes50ns204.8µsTCK LOW period[1]
TbschYes50ns204.8µsTCK HIGH period[2]
TbsodNo-10nsTDI and TMS valid from TCK (falling)[3]
TbsisNo27ns-TDO setup to TCK (rising)[4]
TbsihNo10ns-TDO hold from TCK (rising)-

[1] The Multi-ICE server software enables you to change the TCK LOW and HIGH periods (see Chapter 3 Using the Multi-ICE Server) between the values shown in Table F.2. The other parameters shown in Table F.2 must be considered with the specific values of Tbscl and Tbsch that you have chosen. The default values for an autoconfigured single-TAP system are, nominally, Tbscl=50ns and Tbsch=50ns.

[2] The Multi-ICE server software enables you to change the TCK LOW and HIGH periods (see Chapter 3 Using the Multi-ICE Server) between the values shown in Table F.2. The other parameters shown in Table F.2 must be considered with the specific values of Tbscl and Tbsch that you have chosen. The default values for an autoconfigured single-TAP system are, nominally, Tbscl=50ns and Tbsch=50ns.

[3] Tbsod is the maximum delay between the falling edge of TCK and valid levels on the TDI and TMS Multi-ICE output signals. The target samples these signals on the following rising edge of TCK and so the minimum setup time for the target, relative to the rising edge of TCK, is Tbscl–Tbsod.

[4] Tbsis is the minimum setup time for the TDO input signal, relative to the rising edge of TCK when Multi-ICE samples this signal. The target changes its TDO value on the previous falling edge of TCK and so the maximum time for the target TDO level to become valid, relative to the falling edge of TCK, is Tbscl–Tbsis.

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