G.1.2. Input bit logic

The user input bits correspond to two TTL logic-level outputs available from the user input/output connector (see Figure G.1). You can use these signals to remotely monitor user logic at the server location.

The Multi-ICE JTAG port automatically adapts its input and output thresholds to the voltage levels in the target system (based on the VTref pin). The inputs on the Multi-ICE user I/O connector operate at standard TTL levels. If you must drive one of the user-defined inputs with a signal operating at the target system logic levels, the circuit, as shown in Figure G.2, converts this to TTL levels.

Figure G.2. Converting user-input signals to TTL levels

Pins 15, 17, and 19 are connected to an LM339 type comparator within the Multi-ICE interface unit. The open collector comparator output (pin 19) drives the user input (pin 16), which includes a suitable pull-up resistor. The inverting input to the comparator (pin 15) is driven by an output from the voltage reference mirror circuit (pin 13). The non-inverting input to the comparator (pin 17) is driven by the signal to be monitored using a small series resistor (Rin).

The output of the comparator is also fed back to this input through a large resistor (Rhyst) to provide a small amount of hysteresis (around 20mV with the values shown). A ground reference for the input signal must be connected to pin 20 to provide a more direct return path than through the JTAG connector.

The user input bits are shown at the bottom-right corner of the Multi-ICE server window. Each bit is:

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