4.9.2. Breakpoints

When you inspect the current breakpoints and watchpoints (using the watch or break commands without arguments in the ADW command window, or by viewing the Breakpoints or Watchpoints windows in ADW, AXD, or ADU), the output specifies whether they are hardware or software breakpoints or watchpoints.

Hardware versus software breakpoints

Hardware breakpoints are implemented using an EmbeddedICE logic point to detect an instruction fetch from the appropriate address. This works in all cases, even if the program being debugged modifies itself as it executes, or if the code is in ROM. However, it completely ties up one of the two available EmbeddedICE logic point units.

For ARM processors prior to ARM architecture v5, software breakpoints are implemented using an EmbeddedICE logic unit to detect an instruction fetch of a particular bit pattern. This bit pattern has been stored previously at the appropriate location, and the real instruction stored in the host debugger memory. Any number of software breakpoints can be supported using a single EmbeddedICE logic point.

ARM architecture v5 processors have specific breakpoint instructions, so extra EmbeddedICE logic is not required.

Self-modifying code, code in ROM, or code paged from disk file cannot be debugged using software breakpoints. If you attempt to set a breakpoint on a location in ROM, Multi-ICE detects that the memory is not writable and tries to use a hardware breakpoint.

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