3.3.6. JTAG settings dialog

The JTAG Settings dialog shown in Figure 3.15 enables you to select how Multi-ICE generates the JTAG clock and reset signals. The menu entry is disabled until the target is configured. You must either autoconfigure the target or load a configuration file.

Figure 3.15. The JTAG Settings dialog

The JTAG Settings dialog

Settings that are not defined in the selected target configuration file are set to a default value. Using the dialog box you can:

To use settings defined in the configuration file unchanged, click Use Settings from Config File.

To modify the settings defined in the configuration file, click Use Settings Below. Doing this enables the JTAG Bit Transfer Timing and Reset Behavior control groups. The initial setting for these controls is taken from the current configuration of the server.

In the JTAG Bit Transfer Timing group, you can define the basic TCK frequency, and choose whether adaptive clocking is used:

In the Reset Behavior group, you can define the signals that are asserted when you tell Multi-ICE to reset the target system. There are two signals that the Multi-ICE interface unit can control:

nTRST

When connected correctly, asserting this signal resets only the JTAG logic on the target.

nSRST

When connected correctly, asserting this signal resets the target processor and connected peripherals, but does not reset the JTAG logic.

The radio buttons enable you to select the combination that is asserted when you choose File ? Reset Target or click on the red reset toolbar button.

You must refer to the target documentation to determine the actions these signals have for your target.

Setting TCK periods manually

If you select Set Periods Manually, or include the clocking information in a configuration file, the periods and frequency are calculated using the following formulas:


HIGH period  =  50ns * (high_scale * (high_multiplier + 1))
LOW period   =  50ns * (low_scale * (low_multiplier + 1))
Total period = HIGH period + LOW period


Frequency    = 1 / Total period

For a precalculated table of frequencies and values, refer to TCK frequencies and TCK values. The same HIGH and LOW period values are used in the server configuration file (see Appendix A Server Configuration File Syntax)

Note

At very low JTAG clock rates, the parallel port driver used by the server uses a large proportion of the workstation processing time. This causes any applications that are running to execute at a reduced speed.

You can enter values between 0–255 for the HIGH and LOW periods. The 8-bit values you enter are split into three and five bits to form the scale (S) and the multiplier (M) values as shown in Table 3.2.

Table 3.2. Scale and multiplier values

Scale

Multiplier

7

6

5

4

3

2

1

0

S

S

S

M

M

M

M

M

The multiplier is formed from the lower five bits, allowing values from 0 to 31. Table 3.3 shows the scale value. SSS are the three most significant bits. Scale is the value to be used in the formula:

Table 3.3. Scale values for clocking speeds

SSS

Scale

0

1

1

2

2

4

3

8

4

16

5

32

6

64

7

128

Example 3.3 shows how you might encode some sample frequencies:

Example 3.3.  Deriving values for JTAG HIGH and LOW settings

100kHz (approx)   HIGH = LOW = 162  [SSS = 5 (S = 32)       M = 2]
500kHz            HIGH = LOW = 19   [SSS = 0 (S = 1)        M = 19]
2MHz              HIGH = LOW = 4    [SSS = 0 (S = 1)        M = 4]

Adaptive clocking

If the target provides the RTCK signal, select the Adaptive clocking function to synchronize the clock to the processor clock outside the core. This ensures there are no synchronization problems over the JTAG interface.

Note

If you use the adaptive clocking feature, transmission delays, gate delays, and synchronization requirements result in a lower maximum clock frequency than with non-adaptive clocking. Do not use adaptive clocking unless it is required by the hardware design.

For a full description of the concept of adaptive clocking, see Chapter 6 System Design Guidelines.

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