2.10.4. Timer

The timer is an implementation of the reference timer. It provides two counter-timers. For details see Timer.

The configuration of the timer model is controlled by a section in peripherals.ami. It has the following items:

{Default_Timer=Timer
Range:Base=0x0a800000
;Frequency of clock to controller.
CLK=20000000
;; Interrupt controller source bits - 4 and 5 as standard
IntOne=4
IntTwo=5WAITS=0
}

Range:Base specifies the area in memory into which the timer registers are mapped. For details of the interrupt controller registers, see Timer.

CLK is used to specify the clock rate of the peripheral. This is usually the same as the processor clock rate.

IntOne specifies the interrupt line connection to the interrupt controller for timer 1 interrupts. IntTwo specifies the interrupt line connection to the interrupt controller for timer 2 interrupts.

WAITS specifies the number of wait states that accessing the timer imposes on the processor. The maximum is 30.

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