4.14.3. Changing the cache or TCM size of a synthesizable processor

To change the cache or TCM size of a synthesizable processor, make a copy of the processors.ami file, place it in the appropriate directory (see ARMulator configuration files), and edit it.

For example, to change both caches of the ARM946E-S to 8KB:

  1. Find the following lines in your copy of the processors.ami file:

    {ARM946E-S=ARM946E-S-REV1
    }
    
  2. Insert lines so that this section reads:

    {ARM946E-S=ARM946E-S-REV1
    ICache_Lines=256
    DCache_Lines=256
    }
    

This overrides the corresponding lines in armulate.dsc.

Caution

Any cores that inherit properties from ARM946E-S, such as ARM946E-S-ETM-(L), ARM946E-S-ETM-(M), or ARM946E-S-ETM-(S), are also affected if you make this change.

Cores that do not inherit their properties from ARM946E-S, such as ARM946E-S-REV0 or ARM946E-S-REV1 are not affected.

If you want to change the cache or TCM size of a processor that does not already have a section in processors.ami, you can add a section. For example, to change the instruction RAM size of the ARM926EJ-S from 64KB to 32KB:

  1. Find the following lines at the end of your copy of the processors.ami file:

    {ARM926EJ-S=ARM926EJ-S-REV0
    }
    ;End of Processors
    
  2. Insert lines so that this becomes:

    {ARM926EJ-S=ARM926EJ-S-REV0
    }
    {ARM926EJ-S-MyVersion
    IRamSize=0x8000
    }
    ;End of Processors
    

This overrides the corresponding line in armulate.dsc.

Any details that are not specified in your file remain unaltered from what is specified in armulate.dsc.

Copyright © 1999-2001 ARM Limited. All rights reserved.ARM DUI0058D
Non-Confidential