ARM ® DeveloperSuite Debug Target Guide

Version 1.2


Table of Contents

Preface
About this book
Intended audience
Using this book
Typographical conventions
Further reading
Feedback
Feedback on the ARM Developer Suite
Feedback on this book
1. Introduction
1.1. Debug target overview
1.1.1. ARMulator
1.1.2. Hardware targets
1.1.3. Semihosting
2. ARMulator Basics
2.1. About ARMulator
2.1.1. Accuracy
2.2. ARMulator components
2.2.1. Configuring ARMulator
2.3. Tracer
2.3.1. Debugger support for tracing
2.3.2. Interpreting tracefile output
2.3.3. Configuring Tracer
2.4. Profiler
2.4.1. Configuring Profiler
2.5. ARMulator cycle types
2.5.1. Uncached von Neumanncores
2.5.2. Uncached Harvard cores
2.5.3. Cached cores with MMUs or PUs andAMBA ASB interfaces
2.5.4. Cached cores with MMUsor PUs and AMBA AHB interfaces
2.5.5. Internal cycle types for cached cores
2.5.6. strongARM1
2.5.7. Core-specific verbose statistics
2.6. Pagetable module
2.6.1. Overview of the pagetable module
2.6.2. Controlling the MMUor PU and cache
2.6.3. Controlling registers 2 and 3
2.6.4. Memory regions
2.6.5. Pagetable module andmemory management units
2.6.6. Pagetable module andprotection units
2.7. Default memory model
2.8. Memory modelling withmapfiles
2.8.1. Overview of memory modelling withmapfiles
2.8.2. Clock frequency
2.8.3. Selecting the mapfilememory model
2.8.4. How the mapfile memory model calculateswait states
2.8.5. Configuring the map memory model
2.9. Semihosting
2.9.1. Semihosting configuration
2.10. Peripheral models
2.10.1. Configuring ARMulator to use the peripheralmodels
2.10.2. Configuring details of the peripherals
2.10.3. Interrupt controller
2.10.4. Timer
2.10.5. Watchdog
2.10.6. Stack tracker
2.10.7. Tube
3. Writing ARMulator models
3.1. The ARMulator extension kit
3.1.1. Location of files
3.1.2. Supplied models
3.2. Writing a new peripheral model
3.2.1. Using a sample model as a template
3.2.2. Return values
3.2.3. Initialization, finalization,and state macros
3.2.4. Registering your model
3.3. Building a new model
3.4. Configuring ARMulator to use a newmodel
3.4.1. Adding a .dsc file
3.4.2. Editing default.amiand peripherals.ami
3.5. Configuring ARMulator to disable amodel
4. ARMulator Reference
4.1. ARMulator models
4.1.1. Configuring models through ToolConf
4.2. Communicating with the core
4.2.1. Mode numbers
4.2.2. ARMulif_GetReg
4.2.3. ARMulif_SetReg
4.2.4. ARMulif_GetPC and ARMulif_GetR15
4.2.5. ARMulif_SetPC and ARMulif_SetR15
4.2.6. ARMulif_GetCPSR
4.2.7. ARMulif_SetCPSR
4.2.8. ARMulif_GetSPSR
4.2.9. ARMulif_SetSPSR
4.2.10. ARMulif_ThumbBit
4.2.11. ARMulif_GetMode
4.2.12. ARMulif_CPRead
4.2.13. ARMulif_CPWrite
4.3. Basic model interface
4.3.1. Declaration of a privatestate data structure
4.3.2. Model initialization
4.3.3. Model finalization
4.4. Coprocessor model interface
4.4.1. ARMulif_InstallCoprocessorV5
4.4.2. LDC
4.4.3. STC
4.4.4. MRC
4.4.5. MCR
4.4.6. MCRR
4.4.7. MRRC
4.4.8. CDP
4.4.9. read
4.4.10. write
4.5. Exceptions
4.5.1. ARMulif_SetSignal
4.5.2. ARMulif_GetProperty
4.6. Events
4.6.1. ARMulif_RaiseEvent
4.7. Handlers
4.7.1. Exception handler
4.7.2. Unknown RDI information handler
4.7.3. Event handler
4.8. Memory access functions
4.8.1. Reading from a given address
4.8.2. Writing to a specified address
4.9. Event scheduling functions
4.9.1. ARMulif_ScheduleTimedFunction
4.9.2. ARMulif_DescheduleTimedFunction
4.10. General purpose functions
4.10.1. ARMul_BusRegisterPeripFunc
4.10.2. ARMulif_ReadBusRange
4.10.3. Hostif_RaiseError
4.10.4. ARMulif_Time
4.10.5. ARMul_AddCounterDesc
4.10.6. ARMul_AddCounterValue
4.10.7. ARMul_AddCounterValue64
4.10.8. ARMulif_StopExecution
4.10.9. ARMulif_EndCondition
4.10.10. ARMulif_GetCoreClockFreq
4.10.11. ARMulif_InstallHourglass
4.10.12. ARMulif_RemoveHourglass
4.11. Accessing the debugger
4.11.1. Hostif_DebugPrint
4.11.2. Hostif_ConsolePrint
4.11.3. Hostif_PrettyPrint
4.11.4. Hostif_ConsoleReadC
4.11.5. Hostif_WriteC
4.11.6. Hostif_ConsoleRead
4.11.7. Hostif_ConsoleWrite
4.11.8. Hostif_DebugPause
4.12. Tracer
4.12.1. Tracer_Open
4.12.2. Tracer_Dispatch
4.12.3. Tracer_Close
4.12.4. Tracer_Flush
4.13. Map files
4.13.1. Format of a map file
4.14. ARMulator configuration files
4.14.1. Predefined tags
4.14.2. Processors
4.14.3. Changing the cache or TCM size ofa synthesizable processor
4.15. ToolConf
4.15.1. Toolconf overview
4.15.2. File format
4.15.3. Boolean flags in a ToolConf database
4.15.4. SI units in a ToolConf database
4.15.5. ToolConf_Lookup
4.15.6. ToolConf_Cmp
4.16. Reference peripherals
4.16.1. Interrupt controller
4.16.2. Timer
5. Semihosting
5.1. Semihosting
5.1.1. The SWI interface
5.2. Semihosting implementation
5.2.1. ARMulator
5.2.2. RealMonitor
5.2.3. Angel
5.2.4. Multi-ICE
5.2.5. Multi-ICE DCC semihosting
5.3. Adding an application SWI handler
5.3.1. ARMulator
5.3.2. RealMonitor
5.3.3. Angel
5.3.4. Multi-ICE
5.3.5. Multi-ICE DCC semihosting
5.4. Semihosting SWIs
5.4.1. SYS_OPEN (0x01)
5.4.2. SYS_CLOSE (0x02)
5.4.3. SYS_WRITEC (0x03)
5.4.4. SYS_WRITE0 (0x04)
5.4.5. SYS_WRITE (0x05)
5.4.6. SYS_READ (0x06)
5.4.7. SYS_READC (0x07)
5.4.8. SYS_ISERROR (0x08)
5.4.9. SYS_ISTTY (0x09)
5.4.10. SYS_SEEK (0x0A)
5.4.11. SYS_FLEN (0x0C)
5.4.12. SYS_TMPNAM (0x0D)
5.4.13. SYS_REMOVE (0x0E)
5.4.14. SYS_RENAME (0x0F)
5.4.15. SYS_CLOCK (0x10)
5.4.16. SYS_TIME (0x11)
5.4.17. SYS_SYSTEM (0x12)
5.4.18. SYS_ERRNO (0x13)
5.4.19. SYS_GET_CMDLINE (0x15)
5.4.20. SYS_HEAPINFO (0x16)
5.4.21. SYS_ELAPSED (0x30)
5.4.22. SYS_TICKFREQ (0x31)
5.5. Debug agent interaction SWIs
5.5.1. angel_SWIreason_EnterSVC (0x17)
5.5.2. angel_SWIreason_ReportException (0x18)
5.5.3. angel_SWIreason_LateStartup (0x20)
Glossary

Proprietary Notice

Words and logos marked with ® or ™ are registered trademarks or trademarksowned by ARM Limited. Other brands and names mentioned herein maybe the trademarks of their respective owners.

Neither the whole nor any part of the information containedin, or the product described in, this document may be adapted orreproduced in any material form except with the prior written permissionof the copyright holder.

The product described in this document is subject to continuousdevelopments and improvements. All particulars of the product andits use contained in this document are given by ARM in good faith.However, all warranties implied or expressed, including but notlimited to implied warranties of merchantability, or fitness forpurpose, are excluded.

This document is intended only to assist the reader in theuse of the product. ARM Limited shall not be liable for any lossor damage arising from the use of any information in this document,or any error or omission in such information, or any incorrect useof the product.

Revision History
Revision A October1999 Release 1.0
Revision B March2000 Release 1.0.1
Revision C November2000 Release 1.1
Revision D November2001 Release 1.2
Copyright © 1999-2001 ARM Limited. All rights reserved. ARM DUI0058D
Non-Confidential