5.2.1. ADD and SUB, low registers

Add and subtract. There are three forms of these instructions that operate on low registers. You can:

Syntax

op Rd, Rn, Rm
op Rd, Rn, #expr3
op Rd, #expr8

where:

op

is either ADD or SUB.

Rd

is the destination register. It is also used forthe first operand in op Rd,#expr8 instructions.

Rn

is a register containing the first operand.

Rm

is a register containing the second operand.

expr3

is an expression evaluating (at assembly time) to an integer in the range –7 to +7.

expr8

is an expression evaluating (at assembly time) to an integer in the range –255 to +255.

Usage

op Rd,Rn,Rm performs an Rn + Rm or an RnRm operation, and places the result in Rd.

op Rd,Rn,#expr3 performs an Rn + expr3 or an Rnexpr3 operation, and places the result in Rd.

op Rd,#expr8 performs an Rd + expr8 or an Rdexpr8 operation, and places the result in Rd.

Note

An ADD instruction with a negative value for expr3 or expr8 assembles to the corresponding SUB instruction with a positive constant. A SUB instruction with a negative value for expr3 or expr8 assembles to the corresponding ADD instruction with a positive constant.Be aware of this when looking at disassembly listings.

Restrictions

Rd, Rn, and Rm must all be low registers (that is, in the range r0 to r7).

Condition flags

These instructions update the N, Z, C, and V flags.

Architectures

These instructions are available in all T variants of the ARM architecture.

Examples

    ADD r3,r1,r5
    SUB r0,r4,#5
    ADD r7,#201
    ADD r1,vc+4     ; vc + 4 must evaluate at assembly time to
                    ; an integer in the range -255 to +255

Incorrect examples

    ADD r9,r2,r6    ; high registers not allowed
    SUB r4,r5,#201  ; immediate value out of range
    SUB r3,#-99     ; negative immediate values not allowed
Copyright © 2000, 2001 ARM Limited. All rights reserved.ARM DUI 0068B
Non-Confidential