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Home > ARM Instruction Reference > ARM multiply instructions > SMULxy |

Signed multiply (16-bit by 16-bit, 32-bit result).

`SMUL`

<><`x`

>{`y`

}`cond`

,`Rd`

,`Rm`

`Rs`

where:

`<`

>`x`

is either

or`B`

.`T`

meansuse the bottom end (bits [15:0]) of`B`

,`Rm`

means use the top end (bits [31:16]) of`T`

.`Rm`

`<`

>`y`

is either

or`B`

.`T`

means use the bottom end (bits [15:0]) of`B`

,`Rs`

means use the top end (bits [31:16]) of`T`

.`Rs`

`cond`

is an optional condition code (see

*Conditional execution*).`Rd`

is the ARM register for the result.

`Rm, Rs`

are the ARM registers holding the values to be multiplied.

r15 cannot be used for any of ,

`Rm`

`Rs`

Any combination of ,

`Rm`

`Rs`

The `SMULxy`

instruction multiplies the 16-bit
signed integers from the selected halves of

and `Rm`

,
and places the 32-bit result in

`Rd`