4.3.5. CMP and CMN

Compare and Compare Negative.


CMP{cond} Rn, Operand2
CMN{cond} Rn, Operand2



is an optional condition code (see Conditional execution).


is the ARM register holding the first operand.


is a flexible second operand. See Flexible second operand for details of theoptions.


These instructions compare the value in a register with Operand2. They update the condition flags on the result, but do not place the result in any register.

The CMP instruction subtracts the value of Operand2 from the value in Rn. This is the same as a SUBS instruction, except that the result is discarded.

The CMN instruction adds the value of Operand2 to the value in Rn. This is the same as an ADDS instruction, except that the result is discarded.

In certain circumstances, the assembler can substitute CMN for CMP, or CMP for CMN. Be aware of this when reading disassembly listings. See Instruction substitution for details.

Condition flags

These instructions update the N, Z, C and V flags according to the result.

Use of r15

If you use r15 as Rn, the value used is the address of the instruction plus 8.

You cannot use r15 for any operand in any data processing instruction that has a register-controlled shift (see Flexible second operand).


These instructions are available in all versions of the ARM architecture.


    CMP     r2,r9
    CMN     r0,#6400
    CMPGT   r13,r7,LSL #2

Incorrect example

    CMP     r2,r15,ASR r0   ; r15 not allowed with register
                            ; controlled shift
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