4.9.2. ADRL ARM pseudo-instruction

Load a program-relative or register-relative address into a register. It is similar to the ADR pseudo-instruction. ADRL can load a wider range of addresses than ADR because it generates two data processing instructions.


ADRL is not available when assembling Thumb instructions. Use it only in ARM code.


ADR{cond}L register,expr



is an optional condition code.


is the register to load.


is a program-relative or register-relative expressionthat evaluates to:

  • a non word-aligned address within 64KB

  • a word-aligned address within 256KB.

More distant addresses can be used if the alignment is 16 bytes or more.

The address can be either before or after the address of the instruction or the base register (see Register-relative and program-relative expressions).


For program-relative expressions, the given range is relative to a point two words after the address of the current instruction.


ADRL always assembles to two instructions. Even if the address can be reached in a single instruction, a second, redundant instruction is produced.

If the assembler cannot construct the address in two instructions, it generates an error message and the assembly fails. See LDR ARM pseudo-instruction for information on loading a wider range of addresses (see also Loading constants into registers).

ADRL produces position-independent code, because the address is program-relative or register-relative.

If expr is program-relative, it must evaluate to an address in the same code section as the ADRL pseudo-instruction. Otherwise, it might be out of range after linking.


start   MOV     r0,#10
        ADRL    r4,start + 60000     ; => ADD r4,pc,#0xe800
                                     ;    ADD r4,r4,#0x254
Copyright © 2000, 2001 ARM Limited. All rights reserved.ARM DUI 0068B