See ARM Developer Suite.


American National Standards Institute. An organization that specifies standards for, among other things, computer software.


Angel is a program that enables you to develop and debug applications running on ARM-based hardware. Angel can debug applications running in either ARM state or Thumb state.


The term used to identify a group of processors that have similar characteristics.

ARM Developer Suite

A suite of applications, together with supporting documentation and examples, that enable you to write and debug applications for the ARM family of RISC processors.

ARM eXtended Debugger

The ARM eXtended Debugger (AXD) is the latest debugger software from ARM that enables you to make use of a debug agent in order to examine and control the execution of software running on a debug target. AXD is supplied in both Windows and UNIX versions.


The ARM Symbolic Debugger (armsd) is an interactive source-level debugger providing high-level debugging support for languages such as C, and low-level support for assembly language. It is a command-line debugger that runs on all supported platforms.


ARM and Thumb Procedure Call Standard defines how registers and the stack will be used for subroutine calls.


See ARM eXtended Debugger.


Memory organization where the least significant byte of a word is at a higher address than the most significant byte.


A unit of memory storage consisting of eight bits.

Canonical Frame Address

In DWARF 2, this is an address on the stack specifying where the call frame of an interrupted function is located.


See Canonical Frame Address.


An additional processor which is used for certain operations. Usually used for floating-point math calculations, signal processing, or memory management.


See Current Processor Status Register.

Current place

In compiler terminology, the directory which contains files to be included in the compilation process.

Current Processor Status Register

CPSR. A register containing the current state of control bits and flags.

See Also Saved Processor Status Register.


An application that monitors and controls the execution of a second application. Usually used to find errors in the application program flow.


A 64-bit unit of information. Contents are taken as being an unsigned integer unless otherwise stated.


Debug With Arbitrary Record Format


Executable Linkable Format

Global variables

Variables that are accessible to all code in the application.

See Also Local variables.


A 16-bit unit of information. Contents are taken as being an unsigned integer unless otherwise stated.


An executable file which has been loaded onto a processor for execution.

A binary execution file loaded onto a processor and given a thread of execution. An image can have multiple threads. An image is related to the processor on which its default thread runs.


A change in the normal processing sequence of an application caused by, for example, an external signal.


Producing an application that uses both ARM and Thumb code.


A collection of assembler or compiler output objects grouped together into a single repository.


Software which produces a single image from one or more source assembler or compiler output objects.


Memory organization where the least significant byte of a word is at a lower address than the most significant byte.

Local variable

A variable that is only accessible to the subroutine that created it.

See Also Global variables.


Position Independent Code.

See Also ROPI.


Position Independent Data or the ARM Platform-Independent Development card.

See Also RWPI.


See Processor Status Register.

Processor Status Register

A register containing various control bits and flags.

See Also Current Processor Status Register, Saved Processor Status Register.

Read Only Position Independent

Code and read-only data addresses can be changed at run-time.

Read Write Position Independent

Read/write data addresses can be changed at run-time.


See Read Only Position Independent.


See Read Write Position Independent.

Saved Processor Status Register

SPSR. A register that holds a copy of what was in the Current Processor Status Register before the most recent exception. Each exception mode has its own SPSR.


The accessibility of a function or variable at a particular point in the application code. Symbols which have global scope are always accessible. Symbols with local or private scope are only accessible to code in the same subroutine or object.


A block of software code or data for an Image.


A mechanism whereby the target communicates I/O requests made in the application code to the host system, rather attempting to support the I/O itself.

Software Interrupt

An instruction that causes the processor to call a programer-specified subroutine. Used by ARM to handle semihosting.


See Saved Processor Status Register.


The portion of computer memory that is used to record the address of code that calls a subroutine. The stack can also be used for parameters and temporary variables.


See Software Interrupt.


The actual target processor, (real or simulated), on which the target application is running.

The fundamental object in any debugging session. The basis of the debugging system. The environment in which the target software will run. It is essentially a collection of real or simulated processors.

Vector Floating Point

A standard for floating-point coprocessors where several data values can be processed by a single instruction.


A small block of code used with subroutine calls when there is a requirement to change processor state or branch to an address that cannot be reached in the current processor state.


See Vector Floating Point.


A 32-bit unit of information. Contents are taken as being an unsigned integer unless otherwise stated.

Zero Initialized

R/W memory used to hold variables that do not have an initial value. The memory is normally set to zero on reset.


See Zero Initialized.

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