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Figure A.1 shows the pin numbers of the HDRA plug and socket. All pins on the HDRA socket are connected to the corresponding pins on the HDRA plug.
The signals present on the pins labeled A[31:0], B[31:0], and C[31:0] are described in in Table A.1 for an AHB system bus.
Table A.1. Bus bit assignment (for an AMBA AHB bus)
Pin label | Signal | Description |
|---|---|---|
A[31:0] | HADDR[31:0] | System address bus |
B[31:0] | Not used | - |
C[31:0] | CONT[31:0] | See below |
C[31:16] | Not used | - |
C15 | HMASTLOCK | Locked transaction |
C[14:13] | HRESP[1:0] | Slave response |
| C12 | HREADY | Slave ready |
| C11 | HWRITE | Write transaction |
| C[10:8] | HPROT[2:0] | Transaction protection type |
| C[7:5] | HBURST[2:0] | Transaction burst size |
| C4 | HPROT[3] | Transaction protection type |
| C[3:2] | HSIZE[1:0] | Transaction width |
| C[1:0] | HTRAN[1:0] | Transaction type |
D[31:0] | HDATA[31:0] | System data bus |
| Copyright © 2000-2005 ARM Limited. All rights reserved. | ARM DUI 0138E |
| Non-Confidential | |
| PDF version | |
| Home > Signal Descriptions > HDRA |