| Copyright © 2002-2007 ARM Limited. All rights reserved. | ARM DUI 0153I |
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This section describes the options available when working with registers.
If you are using RealView ARMulator® ISS (RVISS), then the registers in some ARM cores are incompletely modeled, that is:
ARM925T™, wait for interrupt
ARM966E-S™-REV2, TCM register size missing
ARM946E-S™-REV1, r13 trace PID
ARM926EJ-S™, r13 context ID writing to the wrong register
ARM720T™-REV4, does not distinguish trace PID and FCSE r13.
| Copyright © 2002-2007 ARM Limited. All rights reserved. | ARM DUI 0153I |
| Non-Confidential | |
| PDF version | |
| Home > Examining the Target Execution Environment > Viewing registers |