13.18.1. Statistics for uncached von Neumann processors

When simulating an uncached von Neumann architecture processor such as the ARM7TDMI, the following information is displayed:

Reference Points

The name you specify to identify each line of statistics that you add.


The number of program instructions executed.


Internal processor cycles indicating the time an instruction spends in the execute stage of the pipeline.


The number of sequential cycles performed. The CPU requests transfer to or from the same address, or an address that is a word or halfword after the preceding address.


The number of nonsequential cycles performed. The CPU requests transfer to or from an address that is unrelated to the address used in the preceding cycle.


The number of internal cycles performed. The CPU does not require a transfer because it is performing an internal function (or running from cache).


The number of coprocessor cycles performed.


The sum of the S_Cycles, N_Cycles, I_Cycles, and C_Cycles.

See also

Copyright © 2002-2011 ARM. All rights reserved.ARM DUI 0153N