13.8. Viewing registers

The following sections describe the options available when working with registers:


If you are using RealView ARMulator® ISS (RVISS), then the registers in some ARM processors are incompletely modeled, that is:

  • ARM925T™, wait for interrupt

  • ARM966E-S™-REV2, TCM register size missing

  • ARM946E-S™-REV1, r13 trace PID

  • ARM926EJ-S™, r13 context ID writing to the wrong register

  • ARM720T™-REV4, does not distinguish trace PID and FCSE r13.

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