The RVISS cycle count statistics are displayed in the CycleCount tab of the Registers view. What is shown in the tab depends on the processor that you have chosen to simulate.
To view the cycle count statistics:
Select View → Registers from the Code window main menu to open the Registers view.
Click the CycleCount tab.
An example for an uncached von Neumann processor, such as an ARM7TDMI, is shown in Figure 13.54.
An example for an uncached Harvard processor, such as an ARM926EJ-S, is shown in Figure 13.55.
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