13.8.12. Viewing debugger internals

Debugger internals appear in tabs in the Registers view. The tabs that appear depend on your debug target.

Viewing RVISS cycle count statistics

RVISS increments cycle count statistics during target execution.

See Viewing statistics for RVISS targets for more details.

Viewing internal variables for connections through DSTREAM or RealView ICE

RealView Debugger uses internal variables like any other program. These are set up as part of the Debug Configuration. The variables available depend on your Debug Interface and target processor. For target connections through a DSTREAM or RealView ICE unit the debugger internals are displayed in the Debug tab. An example is shown in Figure 13.25.

Figure 13.25. Viewing internal variables (DSTREAM or RealView ICE)

Viewing internal variables (DSTREAM or RealView ICE)

Viewing semihosting controls

Semihosting enables code running on an ARM architecture-based target to use facilities on a host computer that is running RealView Debugger. Examples of such facilities include the keyboard input, screen output, and file system I/O. The method of controlling semihosting depends on the connection you are using.

See also:

Standard semihosting behavior

When you are connected to a target through a DSTREAM or RealView ICE unit, and standard semihosting is enabled, then the target processor enters debug state when a semihosting operation is performed.

If there is ROM or FLASH at the SVC Vector, then the use of semihosting requires a hardware breakpoint on certain processor, such as an ARM7TDMI. In this case, there might be insufficient hardware breakpoint resources left to permit single instruction stepping or source level stepping, so it might be necessary to disable semihosting.

When you connect to an ARM7TDMI on an Integrator/AP board using DSTREAM or RealView ICE, the following warning messages are displayed:

  • for software breakpoint modes AUTO, WATCHPOINT, and BKPT:

    Warning: A software breakpoint is being used to simulate reset vector catch. This may fail to be hit if the memory is remapped when a reset occurs.
  • for software breakpoint mode NONE:

    Warning: Insufficient hardware resources to enable requested vector catch events. Some vector catch events have been disabled.

See also

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