2.5.8. ARMTAP_AccessIR_nClks

Writes data to the TAP controller instruction register (IR) and clocks an ARM processor core the specified number of times.


The functions ARMTAP_AccessIR and ARMTAP_AccessIR_1Clk are deprecated. The first use of either by a connection causes a warning message to appear in the Multi-ICE server log window and they might not be supported in future releases. Use this function instead.


#include “tapop.h”

extern TAPOp_Error ARMTAP_AccessIR_nClks(unsigned8 connectId, unsigned16 TDIbits, unsigned8 TDIrev, unsigned8 nClks, unsigned8 deselect);



Connection ID, as returned by TAPOp_OpenConnection.


Up to 16 bits of data to be written to the TAP controllerinstruction register. This must not be NULL and you cannot mask the value.


A flag determining the bit order of the data:


Write LSB of TDIbits first (normal mode).


Write MSB of TDIbits first (reversed mode).


The number of ARM processor DCLKs to be generated. This is the number of transitions out of Run-Test/Idle that are made. If 0, Run-Test/Idle is avoided altogether. The value of nClks is range checked:

0 <= nClks <= 31


If 0, the connection to this TAP controller remains selected. This excludes access to this TAP controller from other Multi-ICE server connections. Otherwise, the connection is deselected, giving other connections a chance to perform operations.


The function returns:


No error.


Connection could not be made.


The connectId was not recognized.


Failed because:

  • nClks > 31.


The TAP controller was reset or is not in Select-DR-Scan.


The RPC connection was lost while processing this request.


The call attempts to select the connection. If this cannot be done (for example, because another TAP controller is being accessed), the call fails with a TAPOp_UnableToSelect error.

The data to write to the TAP controller is read from TDIbits and sent to the Multi-ICE interface unit. The IR length is part of the device configuration data. Refer to the TAP controller documentation for details on the IR instructions that are supported by your device.

The TAP controller is placed in INTEST and passed through the state Run-Test/Idle once to generate a clock pulse for the ARM processor core. The TAP controller must be in Select-DR-Scan state before the function is used, and is left in this state after the function has been performed.

The number of clocks to the ARM processor core can be specified as:

  • zero (0), so the call behaves like the deprecated function ARMTAP_AccessIR

  • one (1), so the call behaves like the deprecated function ARMTAP_AccessIR_1Clk

  • more than one, and less than 31.

The length of the IR is already known by the Multi-ICE server as this is part of the configuration data for each processor.

If another connection on the same Multi-ICE server resets the TAP controllers by calling TAPOp_AnySequence_W, or TAPOp_AnySequence_RW, or TAPOp_TestResetSignal, all subsequent calls to ARMTAP_AccessIR_nClks are rejected with the error TAPOp_InBadTAPState until the reset is acknowledged. See TAPOp_AnySequence_W for more details.


The following example shows how to place an ARM scan chain in RESTART mode, that causes an ARM processor to resynchronize to the system clock:

#define RESTART 0x4
    /* write instr RESTART, not reversed, 1 clock */
    TAPCheck(ARMTAP_AccessIR_nClks(connectId, RESTART, 0, 1, FALSE));


This function first appeared in Multi-ICE Version 2.1.

See also

These TAPOp API functions provide similar or related functionality:

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