5.3.5. Interaction with RealView Debugger

This section describes how the breakpoint handling in RealView ICE interacts with the breakpoint handling in RealView Debugger. It contains the following sections:

Break details or break capabilities

You can find out what hardware breakpoint resources are available by viewing the break details or break capabilities in RealView Debugger (see the chapter that describes breakpoints in the RealView Debugger User Guide for more information). All ARM cores provide at least two hardware instruction breakpoint resources.

Memory maps

RealView Debugger enables you to define a memory map to describe the layout and type of memory in your system (see the chapter that describes memory mapping in the RealView Debugger User Guide for more

information). When you set a breakpoint, areas of memory that are marked as read-only, such as Flash and ROM, automatically use hardware instruction breakpoints. All other types of memory use software instruction breakpoints by default.

Stepping

When you step through code, the debugger usually sets a temporary breakpoint on the destination address. If the code is in read-only memory, or if the software breakpoint implementation requires hardware assistance, a hardware breakpoint is used for this. If you are unable to step, you might have to free up a hardware breakpoint resource.

Some processors, such as ARM9, provide dedicated single-step hardware. RealView ICE uses this hardware if it is available, but steps larger than a single instruction might revert back to using breakpoints, to improve efficiency.

Note

For ARM7, ARM9, ARM11 or Cortex-A8 processors, interrupts are disabled when single-stepping with RealView ICE. For the ARM10 processor, and for Cortex-M3, interrupts are enabled when single-stepping with RealView ICE.

Interrupt behavior applies only to RVI single-instruction stepping. Higher-level stepping depends on the strategy in RealView Debugger, that is, whether you’ve used the “place Breakpoint and run” method, or the “multiple single-instruction steps” method.

Note

When hardware single-step is used, RealView ICE prevents the core from processing any pending interrupts.

For more information, see the chapter on controlling image execution in RealView Debugger User Guide.

Semihosting

RealView ICE provides an implementation of ARM semihosting (see Semihosting). If the semihosting vector is at the address of the SVC vector, RealView ICE uses SVC vector catch to detect semihosting operations (see Processor exceptions for more information). In all other cases, RealView ICE uses a breakpoint at the semihosting vector to detect semihosting operations.

In both cases, the use of semihosting might use up hardware breakpoint resources, resulting in fewer resources available for your own use. Therefore, you might want to disable semihosting if your program does not use it.

Resource allocation

RealView ICE allocates hardware breakpoint resources as they are received, rather than allocating all the resources at the same time when the debugging session begins. Therefore, if you attempt to set a breakpoint when there are insufficient resources available, RealView ICE displays an error message as soon as you try to set the breakpoint, rather than waiting until debugging begins.

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