A.2.1. JTAG interface signal details

VTref is used to create the logic-level reference for the input comparators on TDO, RTCK and nSRST. RealView ICE clips the logic-level reference to 3.3V. RealView ICE inputs (TDO, RTCK and nSRST) are taken to high-impedance inputs of comparators. Each input is read as a logic 1 when it exceeds half the voltage reference.

VTref also controls the output logic levels to the target. RealView ICE uses analog switches to drive the output signals. The output is connected to ground for a logic 0 and to the JTAG interface voltage for a logic 1.

TDI, TMS and TCK have 47Ω series resistors on the LVDS probe. All other outputs from the LVDS probe and the RealView ICE 20-way connector have 100Ω series resistors.

nSRST and nTRST are both active low signals. When asserted, both these signals are connected to ground for a logic 0. When de-asserted, nSRST uses a 4.7kΩ pull-up for a logic 1, whereas nTRST is driven to the VTref voltage for de-asserted state.

You must ensure that your board has appropriate pull-up and pull-down resistors on the JTAG signals:

The recommended value for pull-ups and pull-downs is 10kΩ, although the optimum value depends on the signal load. For example, pull-downs must be about 1kΩ when working with TTL logic.

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