6.1.3. Capture rates

The ETM on the target board can output 4, 8, or 16 trace data bits. Half-rate clocking enables data to be output from the ETM on both edges of TRACECLK. This effectively halves the clock frequency for the same data rate.

Packing modes enable consecutive trace samples to be written to the same memory location within RealView Trace. This increases the trace depth. It has the disadvantage of coarser time-stamping. Time-stamping can be disabled completely to increase trace depth even more. The system has the capability to set the port width automatically from the Configure ETM dialog box in RealView Debugger.

Half-rate clocking and packing mode facilities provide correct operation at TRACECLK frequencies above 150MHz. Below 150MHz, the RealView Trace system operates without these facilities. With these facilities enabled, TRACECLK speeds of up to 250MHz are supported.

The type of application has a bearing on the instructions that can be captured. See Table 6.1 and Table 6.2 for a comparison between automotive and telecomms applications.

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