4.5.3. AACI registers

The PrimeCell AACI registers are listed in Table 4.11. For a functional description of the registers, see ARM PrimeCell Advanced Audio CODEC Interface (PL041) Technical Reference Manual.

Table 4.11. PrimeCell AACI register summary

Address Name TypeSizeDescription
0x1D000000AACI_RXCR1Read/write29Control register for receive FIFO1
0x1D000004AACI_TXCR1Read/write17Control register for transmit FIFO1
0x1D000008AACI_SR1Read12Status register channel 1
0x1D00000CAACI_ISR1Read 7Interrupt status channel 1
0x1D000010AACI_IE1Read/write7Interrupt enable channel 1
0x1D0000140x1D00004C    Reserved (unused AACI channels)
0x1D000050AACI_SL1RXRead 20Data received on slot 1
0x1D000054AACI_SL1TXRead/write20Data transmitted on slot 1
0x1D000058AACI_SL2RXRead 20Data received on slot 2
0x1D00005CAACI_SL2TXRead/write20Data transmitted on slot 2
0x1D000060AACI_SL12RXRead 20Data received on slot 12
0x1D000064AACI_SL12TXRead/write20Data transmitted on slot 12
0x1D000068AACI_SLFRRead/write14Slot flag register
0x1D00006CAACI_SLISTATRead8Slot interrupt status register
0x1D000070AACI_SLIENRead/write9Slot interrupt enable register
0x1D000074AACI_INTCLRWrite13Interrupt clear register
0x1D000078AACI_MAINCRRead/write12Main control register
0x1D00007CAACI_RESETRead/write1RESET control register
0x1D000080AACI_SYNCRead/write1SYNC control register
0x1D000084AACI_ALLINTSRead28All FIFO interrupt status register
0x1D000088AACI_MAINFRRead2Main flag register
0x1D0000900x1D0000ACAACI_DR1Read/write32Data read or written, from or to FIFO1
0x1D0000B00x1D00017F---Reserved
0x1D0001800x1D00018C---Reserved for test purposes
0x1D0001900x1D000FDC---Reserved
0x1D000FE0AACI_PERIPHID0Read8Identification register, bits [7:0]
0x1D000FE4AACI_PERIPHID1Read8Identification register, bits [15:8]
0x1D000FE8AACI_PERIPHID2Read8Identification register, bits [23:16]
0x1D000FECAACI_PERIPHID3Read8Identification register bits, [31:24]
0x1D000FF0AACI_PCELLID0Read8PrimeCell identification register, bits [7:0]
0x1D000FF4AACI_PCELLID1Read8PrimeCell identification register, bits [15:8]
0x1D000FF8AACI_PCELLID2Read8PrimeCell identification register, bits [23:16]
0x1D000FFCAACI_PCELLID3Read8PrimeCell identification register, bits [31:24]
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