3.5.1. Logic module expansion memory space

The address decoder logic in the PLD provides a default slave response (ERROR) on the system bus for addresses allocated to any logic modules that are not present. In order to prevent the PLD from responding to addresses in the range 0xD0000000 to 0xFFFFFFFF, the nPPRES[3:0] signals on the HDRB connector must be driven low. (nPPRES[3:0] are the names of the signal on HDRB, on the logic module itself, the signals are named nEPRES[3:0].)

Figure 3.5. Memory space

Because of the rotation of these signals through the logic module stack however, modules are only required to drive nEPRES[0] and the appropriate line will be connected to the nPPRES[3:0] signals to the PLD depending on the position of module in the stack (see Figure 3.5).


If the logic module is not present, the attempted memory access results in an abort. Some logic modules can be configured to drive more than one of the nEPRES[3:0] lines in order to claim address space that would normally be available for an absent module.

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