3.7.1. Programmable clock control

The output clock frequencies from the programmable generators on the core module are set using registers instantiated into the core module FPGA.

For the CM9x0 core modules, use the CM_OSC register to set the operating frequency of the system bus clock. For the CM9x6 core modules, use the CM_INIT register to set the operating frequency of the system bus clock. For details on setting the clock frequencies, see the documentation supplied with the core module.

The Integrator/CP baseboard provides an additional IC525 clock generator to supply a UART clock. This is supplied with a 25MHz reference clock and has its divider inputs tied to provide a fixed frequency output of 14.7456MHz.

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