Integrator®/CP User Guide 3.9.2. CP control registers

3.9.2. CP control registers

The CP control registers return information about the Integrator/CP configuration and are used to control media interrupts. The registers are listed in Table 3.11 For more detail, see the documentation for your core module.

Table 3.11. Core Module status, control, and interrupt registers

Register Name	Address	Access	Reset	Description
CP_IDFIELD	`0xCB000000`	Read	Static	CP build information
CP_FLASHPROG	`0xCB000004`	Read	Static	Flash devices
CP_INTREG	`0xCB000008`	Read/Write	POR	Interrupt control
CP_DECODE	`0xCB00000C`	Read/Write	Reset	Fitted logic modules

CP_IDFIELD

The CP_IDFIELD register at 0xCB000000 returns build information.

Table 3.12 describes the ID register bits.

Table 3.12. CM_ID register bit descriptions

Bits	Name	Access	Function
[31:24]	MAN	Read	Manufacturer: 0x41 = ARM
[23:16]	ARCH	Read	`0x03` AHB-Lite system bus, bi-endian
[15:12]	FPGA	Read	`0x4` = EPM7256AE (Altera PLD on Integrator/CP)
[11:4]	BUILD	Read	Build value
[3:0]	REV	Read	Release revision `0x3` = Rev D

CP_FLASHPROG

The CP_FLASHPROG register at 0xCB000004 is used to identify the number of flash devices fitted and to enable the flash.

Table 3.13 describes the register bits.

Table 3.13. CP_FLASHPROG register

Bits	Name	Access	Function
[31:4]	Reserved	Use read-modify-write to preserve value.
[3]	EXTRABANK	Read	Number of devices: 0 = 2 devices 1 = 4 devices.
[2]	FLASHSIZE	Read	size of devices: 0 = 64MBit 1 = 128MBit.
[1]	FLWREN	Read/write	Enable writing to flash (nWE).
[0]	FLVPPEN	Read/write	Enable flash programming voltage Vpp.

CP_INTREG

The CP_INTREG at 0xCB000008 is used to acknowledge and control interrupts related to the MMCI and UART ring indicator.

Table 3.14 describes the register bits.

Table 3.14. CP_INTREG register

Bits	Name	Access	Function
[31:5]	Reserved	Use read-modify-write to preserve value.
[3]	CARDINSERT	Write	Signals that a MMC has been inserted. Write 1 to acknowledge and clear the card inserted interrupt.
[2]	RI1	Write	Signals that UART1 ring indicator signal (RI1) has been asserted. Write 1 to acknowledge and clear.
[1]	RI0	Write	Signals that UART0 ring indicator signal (RI0) has been asserted. Write 1 to acknowledge and clear.
[0]	WPROT	Read	This is the MMC write-protection status. This does not generate an interrupt.

CP_DECODE

Bits 7 to 6 of the CP_DECODE register at 0xCB00000C indicates whether logic modules are fitted.

Table 3.15 describes the register bits.

Table 3.15. CP_DECODE register

Bits	Name	Function
[31:8]	Reserved	Use read-modify-write to preserve value.
[7]	LM3	This bit indicates that logic module 3 is fitted.
[6]	LM2	This bit indicates that logic module 2 is fitted.
[5]	LM1	This bit indicates that logic module 1 is fitted.
[4:0]	Reserved	Returns value `0b10001`.

Copyright © 2002 ARM Limited. All rights reserved.	ARM DUI 0159B
Non-Confidential
PDF version