4.8.2. UART functional overview

This section provides a functional overview of the UARTs. For detailed information about the UART, see the UART (PL011) Technical Reference Manual.

Data for transmission is written into a 16-byte transmit FIFO and the UART starts transmitting data frames with the parameters defined in the UART line control register. Transmission continues until the FIFO is emptied.

On the receive side, the UART begins sampling after it receives a start bit (LOW level input). When a complete word has been received, it is stored in the receive FIFO together with any error bits associated with that word. See Overview of UART registers for details of the read FIFO bits.

You can disable the FIFOs. In this case, the UART provides 1-byte holding registers for the transmit and receive channels. The overrun bit in the UART_RSR register is set and an interrupt is generated if a byte is received before the previous one has been read.

A feature of the UART means that the FIFOs are not physically disabled but are bypassed. This means that if an overrun error occurs, the excess data is still stored in the FIFO and must be read out to clear the FIFO.

You set the baud rate of the UART by programming the bit rate divisor registers UART_LCRM and UART_LCRL.

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