4.7.4. KMI registers

The KMI registers are summarized in Table 4.14. For more detailed information, refer to the KMI (PL050) Technical Reference Manual.

Table 4.14. KMI register summary

KeyboardAddressMouseAddress

Name

Type

Description

0x18000000

0x19000000

KMI_CR

Read/write

Control register

0x180000040x19000004

KMI_STAT

Read

Status register

0x180000080x19000008

KMI_DATA

Read

Received data register, bits [7:0]

Write

Transmit data register, bits [7:0]

0x180000100x19000010

KMI_IR

Read

Interrupt identification register bit [0] =1 for interrupt

Table 4.15. Keyboard and mouse control registers

BitControl
[0]Force clock low, 0 = tristate (default), 1 = low
[1]Force data low, 0 = tristate (default), 1 = low
[2]Enable interface, 0 = disabled (default), 1 = enabled
[3]Enable Transmit interrupt, 0 = disabled (default), 1 = enabled
[4]Enable Receive interrupt, 0 = disabled (default), 1 = enabled
[5]Interface type, 0 = standard (default), 1 = no line control

Table 4.16. Keyboard and mouse status registers

Bit Status
[0]Read data input line
[1]Read clock input line
[2]Read parity for last character, 1 = odd, 0 = even
[3]Receiver busy, 0 = idle, 1 = busy receiving
[4]Receive register full, 0 = empty, 1 = full
[5]Transmitter busy, 0 = idle, 1 = busy receiving
[6]Transmit register empty, 0 = full, 1 = empty
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