4.9.2. Counter/timer registers

The counter/timer registers control the three counter/timers. There are seven registers for each of the counter/timers, as shown in Table 4.18.

Table 4.18. Timer register summary

AddressTypeWidthReset valueNameDescription
0x13000000Read/write320x00000000Timer0LoadLoad value for Timer 0
0x13000004Read320xFFFFFFFFTimer0ValueThe current value for Timer 0
0x13000008Read/write80x20Timer0ControlTimer 0 control register
0x1300000CWrite--Timer0IntClrTimer 0 interrupt clear
0x13000010Read10x0Timer0RISTimer 0 raw interrupt status
0x13000014Read10x0Timer0MISTimer 0 masked interrupt status
0x13000018Read/write320x00000000Timer0BGLoadBackground load value for Timer 0
0x13000100Read/write320x00000000Timer1LoadLoad value for Timer 1
0x13000104Read320xFFFFFFFFTimer1ValueThe current value for Timer 1
0x13000108Read/write80x20Timer1ControlTimer 1 control register
0x1300010CWrite--Timer1IntClrTimer 1 interrupt clear
0x13000110Read10x0Timer1RISTimer 1 raw interrupt status
0x13000114Read10x0Timer1MISTimer 1 masked interrupt status
0x13000118Read/write320x00000000Timer1BGLoadBackground load value for Timer 1
0x13000200Read/write320x00000000Timer2LoadLoad value for Timer 2
0x13000204Read320xFFFFFFFFTimer2ValueThe current value for Timer 2
0x13000208Read/write80x20Timer2ControlTimer 2 control register
0x1300020CWrite--Timer2IntClrTimer 2 interrupt clear
0x13000210Read10x0Timer2RISTimer 2 raw interrupt status
0x13000214Read10x0Timer2MISTimer 2 masked interrupt status
0x13000218Read/write320x00000000Timer2BGLoadBackground load value for Timer 2

Timer x load register

This is a 32-bit register containing the value from which the counter is to decrement. This is the value used to re-load the counter when Periodic mode is enabled, and the current count reaches zero.

When this register is written to directly, the current count is immediately reset to the new value at the next rising edge of TIMCLK which is enabled by TIMCLKEN.

The value in this register is also overwritten if the TimerXBGLoad register is written to, but the current count is not immediately affected.

If values are written to both the TimerXLoad and TimerXBGLoad registers before an enabled rising edge on TIMCLK, the following occurs:

  • on the next enabled TIMCLK edge, the value written to the TimerXLoad value replaces the current count value

  • each time the counter reaches zero, the current count value is reset to the value written to TimerXBGLoad.

Reading from the TimerXLoad register at any time after the two writes have occurred will retrieve the value written to TimerXBGLoad. That is, the value read from TimerXLoad is always the value that will take effect for Periodic mode after the next time the counter reaches zero.

Timer x background load

This is a 32-bit register containing the value from which the counter is to decrement. This is the value used to reload the counter when Periodic mode is enabled, and the current count reaches zero.This register provides an alternative method of accessing the TimerXLoad register. The difference is that writes to TimerXBGLoad will not cause the counter immediately to restart from the new value.Reading from this register returns the same value returned from TimerXLoad.

Timer x current value register

The timer value register contains the current count value for the timer. The upper 16 bits (of 32 bits) are undefined.

Timer x control register

The timer control registers are 8-bit read/write registers that control the operation of their associated counter/timers. The format of these three registers is similar.

Figure 4.20. Timer control register

Table 4.19 describes the timer control register bits.

Table 4.19. TIMERx_CTL register

Bit

Name

Function

[7]

ENABLE

Timer enable: 0 = disabled 1 = enabled.

[6]

MODE

Timer mode: 0 = free running, counts once and then wraps to 0xFFFF 1 = periodic, reloads from load register at the end of each count.

[5]

IE

Interrupt enable

[4]

R

Unused, always write as 0s.

3:2

PRESCALE

Prescale divisor: 00 = none 01 = divide by 16

10 = divide by 256

11 = undefined.

1

TimerSizeSelects 16/32 bit counter operation: 0 = 16-bit counter (default) 1 = 32-bit counter For 16-bit mode, write the high 16 bits of the 32-bit value as 0.

0

OneShot CountSelects one-shot or wrapping counter mode: 0 = wrapping mode (default) 1 = one-shot mode

Timer x clear register

The timer clear register is a write-only location that does not have a storage element. Writing any value to this location clears the interrupt for the associated counter/timer.

Timer x raw interrupt status register

Bit 0 of this register indicates the raw interrupt status from the counter. This value is ANDed with the timer interrupt enable bit from the control register to create the masked interrupt that is passed to the interrupt output pin. Table 4.20 shows the bit assignments for the TimerXRIS register.

Table 4.20. TimerXRIS register

BitNameTypeFunction
[0]Raw Timer InterruptReadRaw interrupt status from the counter

Timer x interrupt status register

Bit 0 of this register indicates the masked interrupt status from the counter. This value is the logical AND of the raw interrupt status with the timer interrupt enable bit from the control register, and is the same value that is passed to the interrupt output pin. Table 4.21 shows the bit assignments for the TimerXMIS register.

Table 4.21. TimerXMIS register

BitNameTypeFunction
[0]Timer InterruptReadEnabled interrupt status from the counter
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