2.5.1. Sample output

The actual output from the boot monitor depends on your core module. A sample output from an Integrator/CP with a CM920T is shown below.

boot Monitor > x dh 
Core Modules 
============ 
------ FPGA ------- 
CM Core       Arch  SSRAM  SDRAM  Bus   Type      Rev Build  Silicon ID 
-- ----       ----  -----  -----  ---   ----      --- -----  ---------- 
0  ARM920       4T     1M   128M  ASB   XCV600     D    17      0x03 

System 
====== 
---- FPGA/PLD ----- 
Type  Endian        SSRAM  Flash  Bus   Type      Rev Build 
----  ------        -----  -----  ---   ----      --- ----- 
CP    Either            0    16M  AHB   EPM7256AE  D    13 

boot Monitor >
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