Integrator™/CM10200E and CM10220E User Guide 4.3.3. Oscillator Register, CM

4.3.3. Oscillator Register, CM_OSC

The Core Module Oscillator Register, CM_OSC, at 0x10000008 is a read/write register that controls the frequency of the clocks generated by the two clock generators (see Clock generators). In addition, it provides information about processor bus mode setting. Figure 4.4 shows the bit assignment of the register.

Figure 4.4. Oscillator Register, CM_OSC

Note

Before writing to the CM_OSC Register, unlock it by writing the value 0x0000A05F to the CM_LOCK Register. After writing the CM_OSC Register, relock it by writing any value other than 0x0000A05F to the CM_LOCK Register.

Table 4.6 describes the Core Module Oscillator Register bit assignments.

Table 4.6. Oscillator Register, CM_OSC bit assignment

Bits	Name	Access	Function
[31:25]	Reserved	Use read-modify-write to preserve value.
[24:23]	BMODE	Read	This field contains 11 and indicates that: the ratio between the test chip GCLK and HCLK is selected by writing to coprocessor 15 register 1 the ratio between the test chip HCLK and the external HCLK is selected by the HBUSSEL bits in register CM_INIT.
[22:8]	Reserved	Use read-modify-write to preserve value.
[7:0]	C_VDW	Read/write	Core clock VCO Divider Word. Defines the binary value of the V[7:0] pins of the clock generator (V[8] is tied LOW).

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