| Copyright © 2002. All rights reserved. | ARM DUI 0169A |
| Non-Confidential | |
 PDF version | |
| Home > Architecture and Module Overview > About the Integrator modules > Integrator/AP |
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| Home > Architecture and Module Overview > About the Integrator modules > Integrator/AP |
The major features of the Integrator/AP are as follows:
system controller Field Programmable Gate Array (FPGA) that implements:
system bus interface to the core and logic modules
system bus arbiter
interrupt controller
peripheral input and output controllers
three counter/timers
reset controller
system status and control registers
clock generator
32MB flash memory
256KB boot ROM
512KB SSRAM
two serial ports (RS232 DTE)
expandable system architecture supporting additional core and logic modules (up to 5 in total)
PCI bus interface
External Bus Interface (EBI), supporting memory expansion.
| Copyright © 2002. All rights reserved. | ARM DUI 0169A |
| Non-Confidential | |
| PDF version | |
| Home > Architecture and Module Overview > About the Integrator modules > Integrator/AP |