RealView™ Compilation Tools for BREW Assembler Guide 4.2. ARM memory access instructions

4.2. ARM memory access instructions

This section contains the following subsections:

LDR and STR, words and unsigned bytes
Load register and store register, 32-bit word or 8-bit unsigned byte.
LDR and STR, halfwords and signed bytes
Load register, signed 8-bit bytes and signed and unsigned 16-bit halfwords.
Store register, 16-bit halfwords.
LDM and STM
Load and store multiple registers.
SWP
Swap data between registers and memory.

There is also an LDR pseudo-instruction (see LDR ARM pseudo-instruction). This pseudo-instruction sometimes assembles to an LDR instruction, and sometimes to a MOV or MVN instruction.

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