RealView ™ Compilation Tools for BREW Assembler Guide

Version 1.2


Table of Contents

Preface
About this book
Intended audience
Using this book
Typographical conventions
Further reading
Feedback
Feedback on RealView Compilation Tools for BREW
Feedback on this book
1. Introduction
1.1. About RealView Compilation Tools for BREW assembler
2. Writing ARM and Thumb Assembly Language
2.1. Introduction
2.1.1. Code examples
2.2. Overview of the ARM architecture
2.2.1. Architecture versions
2.2.2. ARM and Thumb state
2.2.3. Processor mode
2.2.4. Registers
2.2.5. ARM instruction set overview
2.2.6. ARM instruction capabilities
2.2.7. Thumb instruction setoverview
2.2.8. Thumb instruction capabilities
2.2.9. Differences between Thumb and ARM instruction sets
2.3. Structure of assembly language modules
2.3.1. Layout of assembly language source files
2.3.2. An example ARM assembly language module
2.3.3. Calling subroutines
2.3.4. An example Thumb assembly languagemodule
2.4. Using the C preprocessor
2.5. Conditional execution
2.5.1. The ALU status flags
2.5.2. Execution conditions
2.5.3. Using conditional execution in ARMstate
2.5.4. Example of the use of conditional execution
2.6. Loading constants into registers
2.6.1. Direct loading withMOV and MVN
2.6.2. Loading with LDR Rd, =const
2.7. Loading addresses into registers
2.7.1. Direct loading with ADR and ADRL
2.7.2. Loading addresses withLDR Rd, = label
2.8. Load and store multiple register instructions
2.8.1. ARM LDM and STM instructions
2.8.2. LDM and STM addressing modes
2.8.3. Implementing stackswith LDM and STM
2.8.4. Block copy with LDMand STM
2.8.5. Thumb LDM and STM instructions
2.9. Using macros
2.9.1. Test-and-branch macro example
2.9.2. Unsigned integer division macro example
2.10. Describing data structures with MAPand FIELD directives
2.10.1. Relative maps
2.10.2. Register-based maps
2.10.3. Program-relative maps
2.10.4. Finding the end of the allocated data
2.10.5. Forcing correct alignment
2.10.6. Using register-based MAP and FIELDdirectives
2.10.7. Using two register-based structures
2.10.8. Avoiding problems withMAP and FIELD directives
2.11. Using frame directives
3. Assembler Reference
3.1. Command syntax
3.2. Format of source lines
3.3. Predefined register and coprocessornames
3.3.1. Predeclared register names
3.3.2. Predeclared program status register names
3.3.3. Predeclared floating-point register names
3.3.4. Predeclared coprocessor names
3.4. Built-in variables
3.4.1. Determining the armasm version atassembly time
3.5. Symbols
3.5.1. Symbol naming rules
3.5.2. Variables
3.5.3. Numeric constants
3.5.4. Assembly time substitutionof variables
3.5.5. Labels
3.5.6. Local labels
3.6. Expressions, literals, and operators
3.6.1. String expressions
3.6.2. String literals
3.6.3. Numeric expressions
3.6.4. Numeric literals
3.6.5. Floating-point literals
3.6.6. Register-relative andprogram-relative expressions
3.6.7. Logical expressions
3.6.8. Logical literals
3.6.9. Operator precedence
3.6.10. Unary operators
3.6.11. Binary operators
4. ARM Instruction Reference
4.1. Conditional execution
4.2. ARM memory access instructions
4.2.1. LDR and STR, wordsand unsigned bytes
4.2.2. LDR and STR, halfwordsand signed bytes
4.2.3. LDM and STM
4.2.4. SWP
4.3. ARM general data processing instructions
4.3.1. Flexible second operand
4.3.2. ADD, SUB, RSB, ADC,SBC, and RSC
4.3.3. AND, ORR, EOR, andBIC
4.3.4. MOV and MVN
4.3.5. CMP and CMN
4.3.6. TST and TEQ
4.4. ARM multiply instructions
4.4.1. MUL and MLA
4.4.2. UMULL, UMLAL, SMULLand SMLAL
4.5. ARM branch instructions
4.5.1. B and BL
4.5.2. BX
4.6. ARM coprocessor instructions
4.6.1. CDP
4.6.2. MCR
4.6.3. MRC
4.6.4. LDC, STC
4.7. Miscellaneous ARM instructions
4.7.1. SWI
4.7.2. MRS
4.7.3. MSR
4.8. ARM pseudo-instructions
4.8.1. ADR ARM pseudo-instruction
4.8.2. ADRL ARM pseudo-instruction
4.8.3. LDR ARM pseudo-instruction
4.8.4. NOP ARM pseudo-instruction
5. Thumb Instruction Reference
5.1. Thumb memory access instructions
5.1.1. LDR and STR, immediateoffset
5.1.2. LDR and STR, registeroffset
5.1.3. LDR and STR, pc orsp relative
5.1.4. PUSH and POP
5.1.5. LDMIA and STMIA
5.2. Thumb arithmetic instructions
5.2.1. ADD and SUB, low registers
5.2.2. ADD, high or low registers
5.2.3. ADD and SUB, sp
5.2.4. ADD, pc or sp relative
5.2.5. ADC, SBC, and MUL
5.3. Thumb general data processing instructions
5.3.1. AND, ORR, EOR, andBIC
5.3.2. ASR, LSL, LSR, andROR
5.3.3. CMP and CMN
5.3.4. MOV, MVN, and NEG
5.3.5. TST
5.4. Thumb branch instructions
5.4.1. B
5.4.2. BL
5.4.3. BX
5.5. Thumb software interrupt instruction
5.5.1. SWI
5.6. Thumb pseudo-instructions
5.6.1. ADR Thumb pseudo-instruction
5.6.2. LDR Thumb pseudo-instruction
5.6.3. NOP Thumb pseudo-instruction
6. Directives Reference
6.1. Alphabetical list of directives
6.2. Symbol definition directives
6.2.1. GBLA, GBLL, and GBLS
6.2.2. LCLA, LCLL, and LCLS
6.2.3. SETA, SETL, and SETS
6.2.4. RLIST
6.2.5. CN
6.2.6. CP
6.3. Data definition directives
6.3.1. LTORG
6.3.2. MAP
6.3.3. FIELD
6.3.4. SPACE
6.3.5. DCB
6.3.6. DCD and DCDU
6.3.7. DCDO
6.3.8. DCFD and DCFDU
6.3.9. DCFS and DCFSU
6.3.10. DCI
6.3.11. DCQ and DCQU
6.3.12. DCW and DCWU
6.3.13. DATA
6.4. Assembly control directives
6.4.1. Nesting directives
6.4.2. MACRO and MEND
6.4.3. MEXIT
6.4.4. IF, ELSE, and ENDIF
6.4.5. WHILE and WEND
6.5. Frame description directives
6.5.1. FRAME ADDRESS
6.5.2. FRAME POP
6.5.3. FRAME PUSH
6.5.4. FRAME REGISTER
6.5.5. FRAME RESTORE
6.5.6. FRAME SAVE
6.5.7. FRAME STATE REMEMBER
6.5.8. FRAME STATE RESTORE
6.5.9. FUNCTION or PROC
6.5.10. ENDFUNC or ENDP
6.6. Reporting directives
6.6.1. ASSERT
6.6.2. INFO
6.6.3. OPT
6.6.4. TTL and SUBT
6.7. Miscellaneous directives
6.7.1. ALIGN
6.7.2. AREA
6.7.3. CODE16 and CODE32
6.7.4. END
6.7.5. ENTRY
6.7.6. EQU
6.7.7. EXPORT or GLOBAL
6.7.8. EXPORTAS
6.7.9. EXTERN
6.7.10. GET or INCLUDE
6.7.11. GLOBAL
6.7.12. IMPORT
6.7.13. INCBIN
6.7.14. INCLUDE
6.7.15. KEEP
6.7.16. NOFP
6.7.17. REQUIRE
6.7.18. RN
6.7.19. ROUT
Glossary

List of Figures

4.1. ROR
4.2. RRX

Proprietary Notice

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Neither the whole nor any part of the information containedin, or the product described in, this document may be adapted orreproduced in any material form except with the prior written permissionof the copyright holder.

The product described in this document is subject to continuousdevelopments and improvements. All particulars of the product andits use contained in this document are given by ARM in good faith.However, all warranties implied or expressed, including but notlimited to implied warranties of merchantability, or fitness forpurpose, are excluded.

This document is intended only to assist the reader in theuse of the product. ARM Limited shall not be liable for any lossor damage arising from the use of any information in this document,or any error or omission in such information, or any incorrect useof the product.

Revision History
Revision A August2001 Release 1.0
Revision B June2002 Release 1.2
Copyright © 2001, 2002 ARM Limited. All rights reserved. ARM DUI 0170B
Non-Confidential