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Enables you to set a tracepoint on instruction execution.
[,TRACEINSTREXEC qualifier...] {address | address-range}
where:
qualifierIs an ordered list of zero or more qualifiers. The possible qualifiers are described in List of qualifiers.
addressSpecifies the address at which the tracepoint is placed.
address-rangeSpecifies the address range at which the tracepoint is placed.
This command sets a tracepoint at the address or address range you specify that triggers when an instruction is executed in the indicated address range.
The tracepoint type is by default to trigger, that is, start
collecting trace information into the trace buffer. You can modify
the action using the hw_out: qualifier to, for
example, stop tracing.
The command qualifiers are as follows, but not all qualifiers are available for all of the supported trace targets:
hw_ahigh:(n)Specifies the high address for an address-range tracepoint. The low address is specified by the standard tracepoint address.
For example, to set a tracepoint that triggers when an instruction is
executed at an address in the range 0x1000-0x1200,
enter the command:
TRACEINSTREXEC,hw_ahigh:0x1200 0x1000
This is equivalent to the command:
TRACEINSTREXEC 0x1000..0x1200
hw_and:{id |
"then-id"}Perform
an and or an and-then conjunction
with an existing tracepoint identified by ,
which is one of:id
next for
the next breakpoint specified for this connection
prev for the last breakpoint
specified for this connection
the breakpoint list index of an existing breakpoint.
The parentheses are optional.
Tracepoints set in this way are called chained tracepoints. How RealView Debugger processes the tracepoints depends on the conjunction you have used:
In the and form, the conditions associated with both tracepoints are chained together, so that trace capture starts only when both conditions simultaneously match.
In the and-then form, RealView Debugger examines the chained tracepoints starting with the last one you specified. When the condition for the last tracepoint is met, the previous tracepoint is enabled. However, trace capture starts only when this tracepoint condition is met. RealView Debugger continues processing all tracepoints in the chain, until the condition in first one you specified is met. At this point, trace capture starts.
You must include the quotes when using the and-then form.
If you clear a tracepoint that has the ID next,
then all tracepoints in the chain are cleared.
If you clear a tracepoint that has the ID prev,
then that tracepoint and the following ones are cleared. The previous
breakpoints in the chain remain set.
hw_dhigh:(n)Specifies the high data value for a data-range tracepoint.
The low data value is specified by the hw_dvalue qualifier.
For example, to set a tracepoint that triggers when an instruction opcode
in the range 0xEA000040-0xEA00004F is
executed at an address in the range 0x1FA00-0x1FAFF,
enter the command:
TRACEINSTREXEC,hw_dvalue:0xEA000040,hw_dhigh:0xEA00004F 0x1FA00..0x1FAFF
hw_dmask:(n)Specifies the data value mask for a data-range tracepoint.
The data value to which the mask is applied is specified by the hw_dvalue qualifier.
The data value range is determined by masking lower order bits out
of the specified data value.
For example, to set a tracepoint that triggers when an instruction having
a basic opcode 0xEA000040 but with any value
in bits [15:8] is executed at an address in the range 0x1FA00-0x1FAFF,
enter the command:
TRACEINSTREXEC,hw_dvalue:0xEA000040,hw_dmask:0xFFFF00FF 0x1FA00..0x1FAFF
hw_dvalue:(n)Specifies a data value to be compared to values transmitted on the processor data bus.
For example, to capture trace when an instruction with an
opcode of 0xEA000040 is executed at an address
in the range 0x1FA00-0x1FAFF,
enter the command:
TRACEINSTREXEC,hw_dvalue:0xEA000040 0x1FA00..0x1FAFF
hw_in:{s}Input trigger tests. The string is
specific to the trace connection being used. For the ARM ETM, the
following case-sensitive forms are defined:s
"Check Condition Code=s"For instruction tracepoints, comparisons, check
the instruction condition code against the specified value, and
return True if it matches, where is:s
PassTrace only instructions that are executed.
FailTrace only instructions that are not executed.
Ignore Security Level=Yes|NoEnables Secure World and Normal World data comparisons for processors that implement the TrustZone technology:
YesMatch when the processor is in any mode. This is the default.
NoMatch only when the processor is in the mode specified by the address suffix:
S: indicates Secure
World.address
N: indicates Normal
World.address
For example, to capture trace when an instruction is executed
at the Secure World address 0x8000, enter the command:
TRACEINSTREXEC,hw_in:{Ignore Security Level=No} S:0x8000.
Size of Data Access=sThis determines the following:
for data accesses, the size of the data transfer
for instruction accesses, the size of the instruction accessed.
The size is
one of:s
AnyDepends on the implementation:
halfword for Thumb code
word for ARM code.
This is the default.
Halfword16-bit accesses (Thumb code).
Word32-bit accesses (ARM code).
hw_not:{s}Use this qualifier to invert the sense of an address,
data, or hw_and term specified in the same command.
The argument can
be set to:s
addrInvert the tracepoint address value.
dataInvert the tracepoint value.
thenInvert
an associated hw_and:{then} condition.
For example, to capture trace when a data value does not match a mask, enter the command:
TRACEINSTREXEC,hw_not:data,hw_dmask:0x00FF ...
The trace commands require an address value, and the addr variant of hw_not uses
this address. For example, to trace execution at addresses other
than the range 0x10040 to 0x10060,
that is, exclude this region from the trace, enter the command:
TRACEINSTREXEC,hw_not:addr 0x10040..0x10060
The hw_not:then variant of the command
is used in conjunction with hw_and to form or and nand-then conditions.
hw_out:{s}Output trigger tests. The string is
specific to the trace connection being used. For the ARM ETM, the
following case-sensitive forms are defined:s
"Tracepoint Type=s"Specify the trace action when an instruction is
executed in the specified range, where depends
on the target connection:s
For an ETM-based
hardware target, s is:
TriggerOutput a trigger event to the TPA.
Start TracingStart trace capture.
Stop TracingStop trace capture.
Trace InstrTrace instructions only.
Trace Instr and DataTrace instructions and data.
An address range can be specified only for Trace Instr and Trace
Instr and Data.
For an RVISS target, s is:
TriggerOutput a trigger event.
Trace Start Point (Instruction
Only)Trace instructions only.
Trace Start Point (Instruction
and Data)Trace instructions and data.
Trace End PointStop trace capture.
You cannot specify an address range with any of these options.
For example, to trace only instructions when an instruction
is executed at an address in the range 0x1E000-0x1FF00,
enter the command:
TRACEINSTREXEC,hw_out:"Tracepoint Type=Trace Instr" 0x1E00..0x1FF00
hw_passcount:(n)Specifies the number of times that the specified condition has to occur to trigger the tracepoint. You can use this option to set up and use the ARM ETM counter hardware, if the ETM has counters and there is one available for use. ETM counters are 32 bits.
modify:(n)Instead of creating a new tracepoint, modify the
tracepoint with tracepoint ID number by
replacing the address expression and the qualifiers of the existing
tracepoint to those specified in this command.n
You cannot use this qualifier with the hw_and qualifier
to change a non-chained tracepoint to a chained tracepoint. However,
you can modify a chained tracepoint with any other qualifier and
also change the address expression.
The following examples show how to use TRACEINSTREXEC:
TRACEINSTREXEC
\MATH_1\#449.3 Set a
hardware tracepoint at statement 3 of line 449 in the file math.c.
TRACEINSTREXEC,hw_pass:(5)
\MAIN_1\#35Set a hardware
tracepoint using an ETM counter to enable tracing the fifth time
that execution reaches line 35 of main.c.
the following in the RealView Debugger Trace User Guide:
Embedded Trace Macrocell Specification.