2.3.21. CACHEFIND

Searches for an address within the cache.

Syntax

CACHEFIND [,level:n] [,instruction | ,data] address

where:

,level:n

The cache level to search. If omitted, the level 1 cache is searched. This qualifier can be shortened to l.

,instruction

Search for the address in the instruction cache.

,data

Search for the address in the data cache.

address

The address to be searched. For a processor that supports the TrustZone® technology, you can specify the S: or N: address prefix, for example S:0x2040.

Description

Search the instruction or data cache for the specified address. If both i and d are omitted, the command searches both instruction and data caches. An address must be provided.

The address does not have to be cache line-aligned. If found, details of the cache line are displayed, including the set and way and the range of addresses cached.

This command is supported on the following processors:

  • ARM1136

  • ARM1156

  • Cortex™-A8.

Examples

To check whether the address 0x1FFE0 is in the level 1 instruction and data caches on an ARM1136JF-S, enter:

> cachefind 0x1FFE0
Data cache line in set 127; way 0 contains address range 0x0001FFE0..0x0001FFFF

See also

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