RealView® Debugger Target Configuration Guide B.4.3. Cortex-R4 configuration parameters

B.4.3. Cortex-R4 configuration parameters

Table B.19 describes the configuration parameters for the Cortex-R4 model.

Table B.19. Cortex-R4 model configuration parameters

Parameter	Description	Default
`cfgnmfi`	Configure non-maskable Fast Interrupts.	`False`
`dcachemax`	Data cache maximum size (`0x0`, `0x1`, `0x3`, `0x7`, or `0xF` Kb).	`0xF`
`dcachemin`	Data cache minimum size (`0x0`, `0x1`, `0x3`, `0x7`, or `0xF` Kb).	`0x0`
`dtcmsize`	Data TCM size (0 to 14Kb).	`0x2000`
`hivecs`	Let exception vectors start at `0xFFFF0000`.	`False`
`icachemax`	Instruction cache maximum size (`0x0`, `0x1`, `0x3`, `0x7`, or `0xF` Kb).	`0xF`
`icachemin`	Instruction cache minimum size (`0x0`, `0x1`, `0x3`, `0x7`, or `0xF` Kb).	`0x0`
`initee`	Set data endianness.	`False`
`initie`	Set instruction endianness.	`False`
`initramd`	Enable D-TCM at reset.	`False`
`initrami`	Enable I-TCM at reset.	`False`
`itcmsize`	Instruction TCM size (0 to 14Kb).	`0x2000`
`loczrami`	Set initial I-TCM offset to `0x00000000`.	`False`
`mpuregions`	Number of MPU regions (0, 8, or 12)	`0xC`
`nodcache`	No Data Cache.	`False`
`noicache`	No Instruction Cache.	`False`
`saveAndRestore-enable`	When disabled the model: can not save its state for a future session can not pick up a saved state from a previous session. There is a minimal overhead on the performance of the simulation when this is enabled.	`False`
`semihosting-ARM_SVC`	The ARM SVC used for semihosting. The value must be in the range 0 to 16777215 (`0xFFFFFF`).	`0x123456`
`semihosting-clock_frequency`	Simulated clock frequency in MHz, which uses the elapsed time based on the number of instructions executed. The value must be in the range 1 to 4294967295 (`0xFFFFFFFF`). Note The number you specify has no relationship to the hardware processor.	`0x32`
`semihosting-cmd_line`	Semihosting command line string used for passing command-line arguments to an image. Separate each argument with a space, and quote any arguments that include a space, for example: `argument1 "argument 2" argument_3`
`semihosting-debug`	Print verbose messages for semihosting.	`False`
`semihosting-enable`	Enable or disable semihosting.	`True`
`semihosting-Thumb_SVC`	The Thumb SVC used for semihosting. The value must be in the range 0 to 16777215 (`0xFFFFFF`).	`0xAB`
`semihosting-heap_base`	Semihosting heap base. The value must be in the range 0 to 4294967295 (`0xFFFFFFFF`).	`0x0`
`semihosting-heap_limit`	Semihosting heap limit. The value must be in the range 0 to 4294967295 (`0xFFFFFFFF`).	`0xF000000`
`semihosting-stack_base`	Semihosting stack base. The value must be in the range 0 to 4294967295 (`0xFFFFFFFF`).	`0x10000000`
`semihosting-stack_limit`	Semihosting stack limit. The value must be in the range 0 to 4294967295 (`0xFFFFFFFF`).	`0xF000000`
`tcmhiinitaddr`	TCM High initialization address offset.	`0x40000000`
`teinit`	Exception handling state. Set processor to Thumb mode when entering an excpetion.	`False`
`warn-extra`	Print some useful additonal warning messages.	`False`
`warn-undefined`	Print a warning when an undefined instruction is hit.	`False`

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B.4.3. Cortex-R4 configuration parameters

Note